SAF-TC1164-128F80HL AB Infineon Technologies, SAF-TC1164-128F80HL AB Datasheet - Page 129

• Manufacturer Part Number: SAF-TC1164-128F80HL AB
• Description: IC MCU 32BIT FLASH LQFP176-2
• Manufacturer: Infineon Technologies
• Series: TC116xr

Specifications of SAF-TC1164-128F80HL AB

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: ASC, CAN, MLI, MSC, SSC
• Peripherals: DMA, POR, WDT
• Number Of I /o: 81
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 76K x 8
• Voltage - Supply (vcc/vdd): 1.42 V ~ 1.58 V
• Data Converters: A/D 36x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 176-LFQFP
• Packages: PG-LQFP-176
• Max Clock Frequency: 80.0 MHz
• Sram (incl. Cache): 76.0 KByte
• Can Nodes: 2
• A / D Input Lines (incl. Fadc): 36
• Program Memory: 1.0 MB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Preliminary
4.3.8.3
Table 4-19
Table 4-19
Parameter
SCLK clock period
MTSR/SLSOx delay from SCLK
MRST setup to SCLK
MRST hold from SCLK
1) SCLK signal rise/fall times are the same as the A2 Pads rise/fall times.
2) SCLK signal high and low times can be minimum 1 ×
3)
Figure 4-19 SSC Master Mode Timing
Data Sheet
T
SSCmin
=
T
SYS
Synchronous Serial Channel (SSC) Master Mode Timing
provides the characteristics of the SSC timing in the TC1163/TC1164.
SCLK
MTSR
MRST
SLSOx
SSC Master Mode Timing (Operating Conditions apply, C
= 1/
f
1)2)
1)
1)
SYS
2)
1)2)
1) This timing is based on the following setup: CON.PH = CON.PO = 0.
2) The transition at SLSOx is based on the following setup: SSOTC.TRAIL = 0
. When
and the first SCLK high pulse is in the first one of a transmission.
f
SYS
t
t
51
51
= 80 MHz,
t
52
t
Data
valid
50
t
50
= 25ns
t
53
125
t
t
t
t
Symbol
50
51
52
53
T
SSC
.
CC 2 ×
CC 0
SR 10
SR 5
t
51
Min.
T
SSC
Limit Values
Electrical Parameters
3)
SSC_Tmg_1.vsd
TC1163/TC1164
Max.
–
8
–
–
L
= 50 pF)
V1.0, 2008-04
Unit
ns
ns
ns
ns