SAF-TC1164-128F80HL AB Infineon Technologies, SAF-TC1164-128F80HL AB Datasheet - Page 30

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SAF-TC1164-128F80HL AB

Manufacturer Part Number
SAF-TC1164-128F80HL AB
Description
IC MCU 32BIT FLASH LQFP176-2
Manufacturer
Infineon Technologies
Series
TC116xr
Datasheet

Specifications of SAF-TC1164-128F80HL AB

Core Processor
TriCore
Core Size
32-Bit
Speed
80MHz
Connectivity
ASC, CAN, MLI, MSC, SSC
Peripherals
DMA, POR, WDT
Number Of I /o
81
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
76K x 8
Voltage - Supply (vcc/vdd)
1.42 V ~ 1.58 V
Data Converters
A/D 36x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFQFP
Packages
PG-LQFP-176
Max Clock Frequency
80.0 MHz
Sram (incl. Cache)
76.0 KByte
Can Nodes
2
A / D Input Lines (incl. Fadc)
36
Program Memory
1.0 MB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Preliminary
Features of Data Flash
Data Sheet
JEDEC-standard based command sequences for PFLASH control
– Write state machine controls programming and erase operations
– Status and error reporting by status flags and interrupt
Margin check for detection of problematic PFLASH bits
16 Kbyte on-chip data Flash memory, organized in two 8 Kbyte banks
Usable for data storage with EEPROM functionality
128 Byte of program interface
– 128 bytes are programmed into one DFLASH page by one step/command
64-bit read interface (no burst transfers)
Dynamic correction of single-bit errors during read access
Detection of double-bit errors
Fixed sector architecture
– Two 8 Kbyte banks/sectors
– Each sector separately erasable
Configurable read protection (combined with write protection) for complete DFLASH
together with PFLASH read protection
Password mechanism for temporary disabling of write and read protection
Erasing/programming of one bank possible while reading data from the other bank
Programming of one bank while erasing the other bank possible
On-chip generation of programming voltage
JEDEC-standard based command sequences for DFLASH control
– Write state machine controls programming and erase operations
– Status and error reporting by status flags and interrupt
Margin check for detection of problematic DFLASH bits
26
Functional Description
TC1163/TC1164
V1.0, 2008-04

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