SAF-C167CS-L16M 3V CA+ Infineon Technologies, SAF-C167CS-L16M 3V CA+ Datasheet - Page 18

• Manufacturer Part Number: SAF-C167CS-L16M 3V CA+
• Description: IC MCU 16BIT ROM/LESS MQFP-144
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C167CS-L16M 3V CA+

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: CAN, EBI/EMI, SPI, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Type: ROMless
• Ram Size: 11K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144- BSQFP
• Data Bus Width: 16 bit
• Data Ram Size: 11 KB
• Interface Type: ASC, CAN, SSC
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Packages: PG-MQFP-144
• Max Clock Frequency: 16.0 MHz
• Sram (incl. Cache): 11.0 KByte
• Can Nodes: 2
• A / D Input Lines (incl. Fadc): 24
• Program Memory: 0.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: F167CSL16M3VCAZNT; F167CSL16M3VCAZXT; SAFC167CSL16M3VCAT; SP000017109; SP000103470

Functional Description
The architecture of the C167CS-3V combines advantages of both RISC and CISC
processors and of advanced peripheral subsystems in a very well-balanced way. In
addition the on-chip memory blocks allow the design of compact systems with maximum
performance.
The following block diagram gives an overview of the different on-chip components and
of the advanced, high bandwidth internal bus structure of the C167CS-3V.
Note: All time specifications refer to a CPU clock of 16 MHz
Figure 3
The program memory, the internal RAM (IRAM) and the set of generic peripherals are
connected to the CPU via separate buses. A fourth bus, the XBUS, connects external
resources as well as additional on-chip resoures, the X-Peripherals (see
The XBUS resources (XRAM, CAN) of the C167CS-3V can be individually enabled or
disabled during initialization. Register XPERCON selects the required modules which
are then enabled by setting the general X-Peripheral enable bit XPEN (SYSCON.2).
Modules that are disabled consume neither address space nor port pins.
Note: The default value of register XPERCON after reset selects 2 KByte XRAM and
Data Sheet
8
8
(see definition in the AC Characteristics section).
module CAN1, so the default XBUS resources are compatible with the C167CR.
Rev 2.0B active
Rev 2.0B active
ProgMem
32 KByte
6+2 KByte
XRAM
CAN2
CAN1
ROM
Port 0
XBUS Control
Block Diagram
External Bus
16
Control
EBC
Instr. / Data
Port 1
16
16
16
32
Channels
ADC
10-Bit
16+8
Port 5
External Instr. / Data
16
(USART)
ASC0
BRGen
Interrupt Controller 16-Level
C166-Core
CPU
BRGen
SSC
(SPI)
14
Port 3
15
PEC
Priority
GPT
T2
T3
T4
T5
T6
Interrupt Bus
PWM
Peripheral Data Bus
Port 7
Data
Data
8
16
CCOM2
16
16
T7
T8
C167CS-L16M3V
RTC
CCOM1
Osc / PLL
Port 8
8
T0
T1
3 KByte
IRAM
Internal
MCB04323_7CS
RAM
Figure
WDT
Low Power
V1.0, 2001-10
3).
16
XTAL