SAF-C167CS-L16M 3V CA+ Infineon Technologies, SAF-C167CS-L16M 3V CA+ Datasheet - Page 40

• Manufacturer Part Number: SAF-C167CS-L16M 3V CA+
• Description: IC MCU 16BIT ROM/LESS MQFP-144
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C167CS-L16M 3V CA+

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: CAN, EBI/EMI, SPI, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Type: ROMless
• Ram Size: 11K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144- BSQFP
• Data Bus Width: 16 bit
• Data Ram Size: 11 KB
• Interface Type: ASC, CAN, SSC
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Packages: PG-MQFP-144
• Max Clock Frequency: 16.0 MHz
• Sram (incl. Cache): 11.0 KByte
• Can Nodes: 2
• A / D Input Lines (incl. Fadc): 24
• Program Memory: 0.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: F167CSL16M3VCAZNT; F167CSL16M3VCAZXT; SAFC167CSL16M3VCAT; SP000017109; SP000103470

Instruction Set Summary
Table 6
The various addressing modes that can be used with a specific instruction, the operation
of the instructions, parameters for conditional execution of instructions, and the opcodes
for each instruction can be found in the “C166 Family Instruction Set Manual”.
This document also provides a detailled description of each instruction.
Table 6
Mnemonic
ADD(B)
ADDC(B)
SUB(B)
SUBC(B)
MUL(U)
DIV(U)
DIVL(U)
CPL(B)
NEG(B)
AND(B)
OR(B)
XOR(B)
BCLR
BSET
BMOV(N)
BAND, BOR,
BXOR
BCMP
BFLDH/L
CMP(B)
CMPD1/2
CMPI1/2
PRIOR
SHL / SHR
ROL / ROR
ASHR
Data Sheet
lists the instructions of the C167CS-3V in a condensed way.
Instruction Set Summary
Add word (byte) operands
Subtract word (byte) operands
Subtract word (byte) operands with Carry
(Un)Signed multiply direct GPR by direct GPR (16-16-bit) 2
(Un)Signed divide register MDL by direct GPR (16-/16-bit) 2
(Un)Signed long divide reg. MD by direct GPR (32-/16-bit) 2
Complement direct word (byte) GPR
Bitwise AND, (word/byte operands)
Bitwise OR, (word/byte operands)
Bitwise XOR, (word/byte operands)
Clear direct bit
Move (negated) direct bit to direct bit
AND/OR/XOR direct bit with direct bit
Compare direct bit to direct bit
Bitwise modify masked high/low byte of bit-addressable
direct word memory with immediate data
Compare word (byte) operands
Compare word data to GPR and decrement GPR by 1/2
Compare word data to GPR and increment GPR by 1/2
Determine number of shift cycles to normalize direct
word GPR and store result in direct word GPR
Shift left/right direct word GPR
Rotate left/right direct word GPR
Arithmetic (sign bit) shift right direct word GPR
Description
Add word (byte) operands with Carry
Negate direct word (byte) GPR
Set direct bit
36
C167CS-L16M3V
Low Power
V1.0, 2001-10
Bytes
2 / 4
2 / 4
2 / 4
2 / 4
2
2
2 / 4
2 / 4
2 / 4
2
2
4
4
4
4
2 / 4
2 / 4
2 / 4
2
2
2
2