AT90LS2333-4AI Atmel, AT90LS2333-4AI Datasheet - Page 16

IC MCU 2K 4MHZ A/D LV IT 32TQFP

AT90LS2333-4AI

Manufacturer Part Number
AT90LS2333-4AI
Description
IC MCU 2K 4MHZ A/D LV IT 32TQFP
Manufacturer
Atmel
Series
AVR® 90LSr
Datasheet

Specifications of AT90LS2333-4AI

Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Table 2. AT90S2333/4433 I/O Space (Continued)
Note:
All AT90S2333/4433 I/Os and peripherals are placed in the I/O space. The I/O locations are accessed by the IN and OUT
instructions transferring data between the 32 general purpose working registers and the I/O space. I/O registers within the
address range $00 - $1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the value of sin-
gle bits can be checked by using the SBIS and SBIC instructions. Refer to the instruction set chapter for more details.
When using the I/O specific commands IN, OUT the I/O addresses $00 - $3F must be used. When addressing I/O registers
as SRAM, $20 must be added to this address. All I/O register addresses throughout this document are shown with the
SRAM address in parentheses.
For compatibility with future devices, reserved bits should be written to zero when accessed. Reserved I/O memory
addresses should never be written.
Some of the status flags are cleared by writing a logical one to them. Note that the CBI and SBI instructions will operate on
all bits in the I/O register, writing a one back into any flag read as set, thus clearing the flag. The CBI and SBI instructions
work with registers $00 to $1F only.
The I/O and peripherals control registers are explained in the following sections.
16
I/O Address (SRAM Address)
Reserved and unused locations are not shown in the table.
$0D ($2D)
$0C ($2C)
$0E ($2E)
$0B ($2B)
$0A ($2A)
$0F ($2F)
$15 ($35)
$14 ($34)
$13 ($33)
$12 ($32)
$11 ($31)
$10 ($30)
$09 ($29)
$08 ($28)
$07 ($27)
$06 ($26)
$05 ($25)
$04 ($24)
$03 ($23)
AT90S/LS2333 and AT90S/LS4433
PORTC
SPDR
UCR
UBRR
ACSR
Name
DDRC
PINC
PORTD
DDRD
PIND
SPSR
SPCR
UDR
USR
ADMUX
ADCSR
ADCH
ADCL
UBRRHI
UART Baud Rate Register
Analog Comparator Control and Status Register
Function
Data Register, Port C
Data Direction Register, Port C
Input Pins, Port C
Data Register, Port D
Data Direction Register, Port D
Input Pins, Port D
SPI I/O Data Register
SPI Status Register
SPI Control Register
UART I/O Data Register
UART Status Register
UART Control Register
ADC Multiplexer Select Register
ADC Control and Status Register
ADC Data Register High
ADC Data Register Low
UART Baud Rate Register High

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