AT90LS2333-4AI Atmel, AT90LS2333-4AI Datasheet - Page 51

• Manufacturer Part Number: AT90LS2333-4AI
• Description: IC MCU 2K 4MHZ A/D LV IT 32TQFP
• Manufacturer: Atmel
• Series: AVR® 90LSr

Specifications of AT90LS2333-4AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 6 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-TQFP, 32-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

•
When this bit is set BOD is enabled and the BODEN is programmed, a fixed bandgap voltage of 1.22 ± 0.05V replaces the
normal input to the positive input (AIN0) of the comparator. When this bit is cleared, the normal input pin PD6 is applied to
the positive input of the comparator.
•
ACO is directly connected to the comparator output.
•
This bit is set (one) when a comparator output event triggers the interrupt mode defined by ACI1 and ACI0. The Analog
Comparator Interrupt routine is executed if the ACIE bit is set (one) and the I-bit in SREG is set (one). ACI is cleared by
hardware when executing the corresponding interrupt handling vector. Alternatively, ACI is cleared by writing a logic one to
the flag.
•
When the ACIE bit is set (one) and the I-bit in the Status Register is set (one), the analog comparator interrupt is activated.
When cleared (zero), the interrupt is disabled.
•
When set (one), this bit enables the Input Capture function in Timer/Counter1 to be triggered by the analog comparator.
The comparator output is in this case directly connected to the Input Capture front-end logic, making the comparator utilize
the noise canceler and edge select features of the Timer/Counter1 Input Capture interrupt. When cleared (zero), no con-
nection between the analog comparator and the Input Capture function is given. To make the comparator trigger the
Timer/Counter1 Input Capture interrupt, the TICIE1 bit in the Timer Interrupt Mask Register (TIMSK) must be set (one).
•
These bits determine which comparator events that trigger the Analog Comparator interrupt. The different settings are
shown in Table 20.
Table 20. ACIS1/ACIS0 Settings
Note:
Caution: Using the SBI or CBI intruction on other bits than ACI in this register, will write a one back into ACI if it is read as
set, thus clearing the flag.
Bit 6 - AINBG: Analog Comparator Bandgap Select
Bit 5 - ACO: Analog Comparator Output
Bit 4 - ACI: Analog Comparator Interrupt Flag
Bit 3 - ACIE: Analog Comparator Interrupt Enable
Bit 2 - ACIC: Analog Comparator Input Capture Enable
Bits 1,0 - ACIS1, ACIS0: Analog Comparator Interrupt Mode Select
ACIS1
When changing the ACIS1/ACIS0 bits, The Analog Comparator Interrupt must be disabled by clearing its Interrupt Enable bit in
the ACSR register. Otherwise an interrupt can occur when the bits are changed.
0
0
1
1
ACIS0
0
1
0
1
Interrupt Mode
Comparator Interrupt on Output Toggle
Reserved
Comparator Interrupt on Falling Output Edge
Comparator Interrupt on Rising Output Edge
AT90S/LS2333 and AT90S/LS4433
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