ATTINY2313-20SI Atmel, ATTINY2313-20SI Datasheet - Page 32

• Manufacturer Part Number: ATTINY2313-20SI
• Description: IC MCU AVR 2K FLASH 20SOIC
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY2313-20SI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -
• Other names: ATTINY2313-24SI; ATTINY2313-24SI

Internal Voltage
Reference
Watchdog Timer
Port Pins
32
ATtiny2313
nificantly to the total current consumption. Refer to
on how to configure the Brown-out Detector.
The Internal Voltage Reference will be enabled when needed by the Brown-out Detection or the
Analog Comparator. If these modules are disabled as described in the sections above, the inter-
nal voltage reference will be disabled and it will not be consuming power. When turned on again,
the user must allow the reference to start up before the output is used. If the reference is kept on
in sleep mode, the output can be used immediately. Refer to
page 38
If the Watchdog Timer is not needed in the application, the module should be turned off. If the
Watchdog Timer is enabled, it will be enabled in all sleep modes, and hence, always consume
power. In the deeper sleep modes, this will contribute significantly to the total current consump-
tion. Refer to
When entering a sleep mode, all port pins should be configured to use minimum power. The
most important is then to ensure that no pins drive resistive loads. In sleep modes where the I/O
clock (clk
power is consumed by the input logic when not needed. In some cases, the input logic is needed
for detecting wake-up conditions, and it will then be enabled. Refer to the section
Enable and Sleep Modes” on page 50
enabled and the input signal is left floating or have an analog signal level close to V
input buffer will use excessive power.
For analog input pins, the digital input buffer should be disabled at all times. An analog signal
level close to V
input buffers can be disabled by writing to the Digital Input Disable Registers (DIDR). Refer to
“Digital Input Disable Register – DIDR” on page
for details on the start-up time.
I/O
) is stopped, the input buffers of the device will be disabled. This ensures that no
“Interrupts” on page 44
CC
/2 on an input pin can cause significant current even in active mode. Digital
for details on how to configure the Watchdog Timer.
for details on which pins are enabled. If the input buffer is
150.
“Brown-out Detection” on page 35
“Internal Voltage Reference” on
2543L–AVR–08/10
“Digital Input
for details
CC
/2, the