AT91SAM7A1-AU Atmel, AT91SAM7A1-AU Datasheet - Page 10

• Manufacturer Part Number: AT91SAM7A1-AU
• Description: IC ARM7 MCU 32BIT ROMLESS144LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7A1-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: AT91SAM7A1-EK - BOARD EVAL FOR AT91SAM7A1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

16. Capture Module (CAPT)
17. Pulse Width Modulator (PWM)
18. Watch Timer (WT)
19. Watchdog (WD)
20. Special Function Module (SFM)
21. Analog-to-digital Converter (ADC)
22. Power Management Controller (PMC)
10
AT91SAM7A1
The capture module is a frame analyzer. It stores the period of time between two edges of a sig-
nal in a register. This period is described as a number of counter cycles. The capture allows data
transfers with the PDC.
The AT91SAM7A1 includes four PWM channels. Each channel can generate pulses. The fre-
quency and the duty cycle of each channel can be configured.
The watch timer provides a seconds counter and an alarm function. The alarm register has a
resolution of 30.5 µs. This allows a 32-bit register to have sufficient range to cater for a 24 or 36
hour period.
The AT91SAM7A1 has an internal watchdog that can be used to prevent system lock-up if the
software becomes trapped in a deadlock.
The AT91SAM7A1 provides registers which implement the following special functions:
The 8-channel, 10-bit Analog-to-Digital Converter (ADC) is based on a Successive Approxima-
tion Register (SAR) approach. The ADC has eight analog input pins, ANA0IN0 to ANA0IN7, and
provides an interrupt signal to the AIC. The ADC has two dedicated analog power supply pins,
VDDANA and GND, and the input reference voltage pin, VREFP. Each channel can be enabled
or disabled independently, and has its own data register. The ADC can be configured to auto-
matically enter Sleep Mode after a conversion sequence, and can be triggered by the software.
The ADC allows a data transfer with the PDC.
The AT91SAM7A1 Power Management Controller allows optimization of power consumption.
The PMC enables/disables the clock inputs of PDC and ARM core. Moreover, the main oscilla-
tor, the PLL and the analog peripherals can be put in standby mode, allowing minimum power
consumption to be obtained. The PMC provides the following operating modes:
Each peripheral clock can be independently stopped or started directly in the peripheral to fur-
ther reduce power consumption in Normal, Wait and Slow Modes.
• Chip identification
• RESET status
• Normal: Clock generator provides clock to chip
• Wait mode: ARM core clock is deactivated
• Slow mode: clock generator is deactivated, the system is clocked at 32.768 kHz
6048C–ATARM–29-Jun-06