HD64F3048BF25 Renesas Electronics America, HD64F3048BF25 Datasheet - Page 613

• Manufacturer Part Number: HD64F3048BF25
• Description: IC H8 MCU FLASH 128K 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3048BF25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

FLMCR1 is an 8-bit register used for flash memory operating mode control. Program-verify mode
or erase-verify mode for addresses H'00000 to H'1FFFF is entered by setting SWE bit to 1 when
FWE = 1, then setting the PV or EV bit. Program mode for addresses H'00000 to H'1FFFF is
entered by setting SWE bit to 1 when FWE = 1, then setting the PSU bit, and finally setting the P
bit. Erase mode for addresses H'00000 to H'1FFFF is entered by setting SWE bit to 1 when FWE
= 1, then setting the ESU bit, and finally setting the E bit. FLMCR1 is initialized by a reset, and in
hardware standby mode and software standby mode. Its initial value is H'80 when a high level is
input to the FWE pin, and H'00 when a low level is input. When on-chip flash memory is disabled,
a read will return H'00, and writes are invalid. Set 1 to bits 6 to 0 by each bit in this register.
Writes are enabled only in the following cases: Writes to bit SWE of FLMCR1 enabled when
FWE = 1, to bits ESU, PSU, EV, and PV when FWE = 1 and SWE = 1, to bit E when FWE = 1,
SWE = 1 and ESU = 1, and to bit P when FWE = 1, SWE = 1, and PSU = 1.
Notes: 1. The programming and erase flowcharts must be followed when setting the bits in this
Bit 7—Flash Write Enable Bit (FWE): Sets hardware protection against flash memory
programming/erasing.
Bit 7: FWE
0
1
Bit 6—Software Write Enable Bit (SWE): Enables or disables flash memory programming and
erasing (applicable addresses: H'00000 to H'1FFFF). Set this bit when setting bits 5 to 0, bits 7 to
0 of EBR.
Bit 6: SWE
0
1
Note:
2. Transitions are made to program mode, erase mode, program-verify mode, and erase-
* Do not execute a SLEEP instruction while the SWE bit is set to 1.
Section 18 ROM (H8/3048F-ONE: Single Power Supply, H8/3048B Mask ROM Version)
register to prevent erroneous programming or erasing.
verify mode according to the settings in this register. When reading flash memory as
normal on-chip ROM, bits 6 to 0 in this register must be cleared.
Description
When a low level is input to the FWE pin (hardware-protected state)
When a high level is input to the FWE pin
Writes disabled
Writes enabled *
[Setting condition]
When FWE = 1
Description
Rev. 3.00 Sep 27, 2006 page 585 of 872
REJ09B0325-0300
(Initial value)