DSP56321VL275 Freescale Semiconductor, DSP56321VL275 Datasheet - Page 35

• Manufacturer Part Number: DSP56321VL275
• Description: IC DSP 24BIT 275MHZ 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: DSP563xxr
• Type: Fixed Pointr

Specifications of DSP56321VL275

• Interface: Host Interface, SSI, SCI
• Clock Rate: 275MHz
• Non-volatile Memory: ROM (576 B)
• On-chip Ram: 576kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.60V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: *
• Package / Case: 196-MAPBGA
• Device Core Size: 24b
• Format: Fixed Point
• Clock Freq (max): 275MHz
• Mips: 275
• Device Input Clock Speed: 275MHz
• Ram Size: 576KB
• Operating Supply Voltage (typ): 1.6/3.3V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale Semiconductor
No.
323 HAS deassertion to data strobe assertion
324 Host data input setup time before write data
325 Host data input hold time after write data
326 Read data strobe assertion to output data
327 Read data strobe assertion to output data
328 Read data strobe deassertion to output data
329 Output data hold time after read data strobe
330 HCS assertion to read data strobe
331 HCS assertion to write data strobe
332 HCS assertion to output data valid
333 HCS hold time after data strobe deassertion
334 Address (HAD[0–7]) setup time before HAS
335 Address (HAD[0–7]) hold time after HAS
336 HA[8–10] (HMUX=1), HA[0–2] (HMUX=0),
337 HA[8–10] (HMUX=1), HA[0–2] (HMUX=0),
338 Delay from read data strobe deassertion to
339 Delay from write data strobe deassertion to
340 Delay from data strobe assertion to host
341 Delay from data strobe assertion to host
strobe deassertion
strobe deassertion
active from high impedance
HACK assertion to output data active from high
impedance
valid
HACK assertion to output data valid
high impedance
HACK deassertion to output data high
impedance
deassertion
Output data hold time after HACK deassertion
deassertion
deassertion
deassertion (HMUX=1)
deassertion (HMUX=1)
HR/W setup time before data strobe assertion
•
•
HR/W hold time after data strobe deassertion
host request assertion for “Last Data Register”
read
host request assertion for “Last Data Register”
write
request deassertion for “Last Data Register”
read or write (HROD=0)
request deassertion for “Last Data Register”
read or write (HROD=1, open drain host
request)
Read
Write
5
5, 7, 8
6, 7, 8
4, 7, 8, 9
5
5
6
Characteristic
5
6
6
4, 7, 8
5
Table 2-10.
10
4
DSP56321 Technical Data, Rev. 11
4
4
4
Host Interface Timings
Expression
1.5 × T
T
T
C
C
2.64
+ 4.95
+ 2.64
C
+
10.14
Min
4.95
1.65
1.65
1.65
9.95
2.31
1.65
2.31
1.65
7.64
0.0
0.0
200 MHz
—
—
—
—
—
8
0
14.78
12.14
300.0
Max
4.95
17
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1,2,12
Min
9.05
7.19
9.47
0.0
4.5
1.5
1.5
1.5
0.0
2.1
1.5
2.1
1.5
220 MHz
—
—
—
—
—
8
0
(Continued)
13.45
11.04
300.0
Max
4.5
16
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Min
4.13
1.38
1.38
1.38
1.93
1.38
1.93
1.38
6.81
0.0
8.3
0.0
8.9
—
—
—
—
—
240 MHz
8
0
AC Electrical Characteristics
12.32
10.12
300.0
Max
4.13
15
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Min
1.23
1.23
1.23
7.77
1.76
1.23
1.76
1.23
6.28
0.0
4.0
4.0
0.0
8.1
—
—
—
—
275 MHz
8
0
300.0
Max
10.2
9.0
—
—
—
—
—
—
—
—
14
—
—
—
—
—
—
—
—
Uni
2-15
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t