DSP56321VL275 Freescale Semiconductor, DSP56321VL275 Datasheet - Page 75

• Manufacturer Part Number: DSP56321VL275
• Description: IC DSP 24BIT 275MHZ 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: DSP563xxr
• Type: Fixed Pointr

Specifications of DSP56321VL275

• Interface: Host Interface, SSI, SCI
• Clock Rate: 275MHz
• Non-volatile Memory: ROM (576 B)
• On-chip Ram: 576kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.60V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: *
• Package / Case: 196-MAPBGA
• Device Core Size: 24b
• Format: Fixed Point
• Clock Freq (max): 275MHz
• Mips: 275
• Device Input Clock Speed: 275MHz
• Ram Size: 576KB
• Operating Supply Voltage (typ): 1.6/3.3V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale Semiconductor
;
M_DSR0 EQU $FFFFEF
M_DDR0 EQU $FFFFEE
M_DCO0 EQU $FFFFED
M_DCR0 EQU $FFFFEC
;
M_DSR1 EQU $FFFFEB
M_DDR1 EQU $FFFFEA
M_DCO1 EQU $FFFFE9
M_DCR1 EQU $FFFFE8
;
M_DSR2 EQU $FFFFE7
M_DDR2 EQU $FFFFE6
M_DCO2 EQU $FFFFE5
M_DCR2 EQU $FFFFE4
;
M_DSR3 EQU $FFFFE3
M_DDR3 EQU $FFFFE2
M_DCO3 EQU $FFFFE1
M_DCR3 EQU $FFFFE0
;
M_DSR4 EQU $FFFFDF
M_DDR4 EQU $FFFFDE
M_DCO4 EQU $FFFFDD
M_DCR4 EQU $FFFFDC
;
M_DSR5 EQU $FFFFDB
M_DDR5 EQU $FFFFDA
M_DCO5 EQU $FFFFD9
M_DCR5 EQU $FFFFD8
;
M_DSS EQU $3
M_DSS0 EQU 0
M_DSS1 EQU 1
M_DDS EQU $C
M_DDS0 EQU 2
M_DDS1 EQU 3
M_DAM EQU $3f0
M_DAM0
M_DAM1
M_DAM2
M_DAM3
M_DAM4
M_DAM5
M_D3D EQU 10
M_DRS EQU $F800
M_DCON EQU 16
M_DPR EQU $60000
DMA Control Register
Register Addresses Of DMA0
Register Addresses Of DMA1
Register Addresses Of DMA2
Register Addresses Of DMA4
Register Addresses Of DMA4
Register Addresses Of DMA5
EQU 4
EQU 5
EQU 6
EQU 7
EQU 8
EQU 9
DSP56321 Technical Data, Rev. 11
; DMA0 Source Address Register
; DMA0 Destination Address Register
; DMA0 Counter
; DMA0 Control Register
; DMA1 Source Address Register
; DMA1 Destination Address Register
; DMA1 Counter
; DMA1 Control Register
; DMA2 Source Address Register
; DMA2 Destination Address Register
; DMA2 Counter
; DMA2 Control Register
; DMA3 Source Address Register
; DMA3 Destination Address Register
; DMA3 Counter
; DMA3 Control Register
; DMA4 Source Address Register
; DMA4 Destination Address Register
; DMA4 Counter
; DMA4 Control Register
; DMA5 Source Address Register
; DMA5 Destination Address Register
; DMA5 Counter
; DMA5 Control Register
; DMA Source Space Mask (DSS0-Dss1)
; DMA Source Memory space 0
; DMA Source Memory space 1
; DMA Destination Space Mask (DDS-DDS1)
; DMA Destination Memory Space 0
; DMA Destination Memory Space 1
; DMA Address Mode Mask (DAM5-DAM0)
; DMA Address Mode 0
; DMA Address Mode 1
; DMA Address Mode 2
; DMA Address Mode 3
; DMA Address Mode 4
; DMA Address Mode 5
; DMA Three Dimensional Mode
; DMA Request Source Mask (DRS0-DRS4)
; DMA Continuous Mode
; DMA Channel Priority
A-11