MCF5272CVM66 Freescale Semiconductor, MCF5272CVM66 Datasheet - Page 374

• Manufacturer Part Number: MCF5272CVM66
• Description: IC MPU 66MHZ COLDFIRE 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272CVM66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-MAPBGA
• Cpu Speed: 66MHz
• Embedded Interface Type: UART, QSPI, USB, TDM
• Digital Ic Case Style: BGA
• No. Of Pins: 196
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

UART Modules
16.3.11 UART Divider Upper/Lower Registers (UDUn/UDLn)
The UDUn registers (formerly called UBG1n) hold the MSB, and the UDLn registers (formerly UBG2n)
hold the LSB of the preload value. UDUn and UDLn concatenate to provide a divider to CLKIN for
transmitter/receiver operation, as described in
16.3.12 UART Autobaud Registers (UABUn/UABLn)
The UABUn registers hold the MSB, and the UABLn registers hold the LSB of the calculated baud rate.
If UCRn[ENAB] is set, the value in these registers is automatically loaded into UDUn and UDLn.
16-14
Address
Address
Address
Address
Reset
Reset
Reset
Reset
Field
Field
Field
Field
R/W
R/W
R/W
R/W
The minimum value that can be loaded on the concatenation of UDUn with
UDLn is 0x0002. Both UDUn and UDLn are write-only and cannot be read
by the CPU.
7
7
7
7
MCF5272 ColdFire
Figure 16-14. UART Autobaud Upper Registers (UABUn)
Figure 16-15. UART Autobaud Lower Registers (UABLn)
Figure 16-12. UART Divider Upper Registers (UDUn)
Figure 16-13. UART Divider Lower Registers (UDLn)
®
MBAR + 0x120 (UABU0), 0x160 (UABU1)
MBAR + 0x124 (UABL0), 0x164 (UABL1)
Integrated Microprocessor User’s Manual, Rev. 3
MBAR + 0x118 (UDU0), 0x158 (UDU1)
MBAR + 0x11C (UDL0), 0x15C (UDL1)
Section 16.5.1.2.1, “CLKIN Baud
NOTE
Autobaud MSB
Autobaud LSB
Divider MSB
Divider LSB
0000_0000
0000_0000
0000_0000
0000_0000
Write only
Write only
Read only
Read only
Rates.”
Freescale Semiconductor
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