XR16L788IQ-F Exar Corporation, XR16L788IQ-F Datasheet - Page 54

• Manufacturer Part Number: XR16L788IQ-F
• Description: IC UART 64B 3.3V OCTAL 100QFP
• Manufacturer: Exar Corporation
• Type: IrDA or RS- 485r

Specifications of XR16L788IQ-F

• Number Of Channels: 8
• Package / Case: 100-BQFP
• Features: *
• Fifo's: 64 Byte
• Protocol: RS485
• Voltage - Supply: 2.97 V ~ 5.5 V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: Surface Mount
• Data Rate: 6.25 Mbps
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.97 V
• Supply Current: 5 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V or 5 V
• No. Of Channels: 8
• Uart Features: Tx/Rx FIFO Counters
• Supply Voltage Range: 2.97V To 5.5V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: QFP
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 1016-1284

XR16L788
HIGH PERFORMANCE 2.97V TO 5.5V OCTAL UART
ABSOLUTE MAXIMUM RATINGS ................................................................................. 44
ELECTRICAL CHARACTERISTICS .............................................................................. 44
PACKAGE DIMENSIONS ............................................................................................... 51
4.4 INTERRUPT STATUS REGISTER (ISR) - READ ONLY .................................................................................. 30
4.5 FIFO CONTROL REGISTER (FCR) - WRITE ONLY ........................................................................................ 32
4.6 LINE CONTROL REGISTER (LCR) - READ/WRITE ........................................................................................ 33
4.7 MODEM CONTROL REGISTER (MCR) - READ/WRITE ................................................................................. 35
4.8 LINE STATUS REGISTER (LSR) - READ ONLY ............................................................................................. 36
4.9 MODEM STATUS REGISTER (MSR) - READ ONLY ...................................................................................... 36
4.10 MODEM STATUS REGISTER (MSR) - WRITE ONLY ................................................................................... 37
4.11 SCRATCH PAD REGISTER (SPR) - READ/WRITE ...................................................................................... 38
4.12 FEATURE CONTROL REGISTER (FCTR) - READ/WRITE ........................................................................... 38
4.13 ENHANCED FEATURE REGISTER (EFR) - READ/WRITE .......................................................................... 40
4.14 TXCNT[7:0]: TRANSMIT FIFO LEVEL COUNTER - READ ONLY ............................................................... 41
4.15 TXTRG [7:0]: TRANSMIT FIFO TRIGGER LEVEL - WRITE ONLY .............................................................. 41
4.16 RXCNT[7:0]: RECEIVE FIFO LEVEL COUNTER - READ ONLY .................................................................. 42
4.17 RXTRG[7:0]: RECEIVE FIFO TRIGGER LEVEL - WRITE ONLY .................................................................. 42
DC ELECTRICAL CHARACTERISTICS ............................................................................................... 44
AC ELECTRICAL CHARACTERISTICS ............................................................................................... 46
R
T
T
T
T
T
T
T
Figure 16. XR16L788 VOL Sink Current Chart ........................................................................................................................... 45
Figure 17. XR16L788 VOH Source Current Chart ...................................................................................................................... 45
Figure 18. 16 Mode (Intel) Data Bus Read and Write Timing ..................................................................................................... 47
Figure 19. 68 Mode (Motorola) Data Bus Read and Write Timing .............................................................................................. 48
Figure 20. Modem Input/Output Timing ...................................................................................................................................... 49
Figure 21. Receive Interrupt Timing [Non-FIFO Mode] ............................................................................................................... 49
Figure 22. Transmit Interrupt Timing [Non-FIFO Mode] .............................................................................................................. 50
Figure 23. Receive Interrupt Timing [FIFO Mode] ....................................................................................................................... 50
Figure 24. Transmit Interrupt Timing [FIFO Mode] ...................................................................................................................... 50
EVISION
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
13: I
14: T
15: P
16: A
17: 16 S
18: S
19: UART R
H
NTERRUPT
RANSMIT AND
ARITY SELECTION
UTO
OFTWARE
ISTORY
ELECTABLE
RS485 H
ESET
S
F
.................................................................................................................................. 52
OURCE AND
LOW
C
R
ALF
ONDITIONS
H
ECEIVE
C
YSTERESIS
-
....................................................................................................................................................... 34
ONTROL
DUPLEX
FIFO T
P
RIORITY
........................................................................................................................................... 43
D
F
L
UNCTIONS
IRECTION
EVELS
RIGGER
L
EVEL
W
C
HEN
T
....................................................................................................................... 40
ONTROL
ABLE AND
..................................................................................................................... 31
T
RIGGER
D
L
ELAY FROM
II
EVEL
T
ABLE
S
ELECTION
-D
T
IS
RANSMIT
S
ELECTED
.......................................................................... 33
-
TO
-R
................................................................ 39
ECEIVE
................................................ 38
REV. 1.2.3