MFRC50001T/0FE,112 NXP Semiconductors, MFRC50001T/0FE,112 Datasheet - Page 23

• Manufacturer Part Number: MFRC50001T/0FE,112
• Description: IC MIFARE READER 32-SOIC
• Manufacturer: NXP Semiconductors
• Series: MIFARE®r

Specifications of MFRC50001T/0FE,112

• Rf Type: Read Only
• Frequency: 13.56MHz
• Features: ISO14443-A, ISO14443-B, ISO15693
• Package / Case: 32-SOIC (0.300", 7.50mm Width)
• Product: RFID Readers
• Operating Temperature Range: - 25 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-2222-5; 935268039112; MFRC500; MFRC51T0FED

NXP Semiconductors
MFRC500_33
Product data sheet
PUBLIC
9.5.3 Timer unit registers
9.6.1 Hard power-down
9.6 Power reduction modes
Table 18
Table 18.
Hard power-down is enabled when pin RSTPD is HIGH. This turns off all internal current
sinks including the oscillator. All digital input buffers are separated from the input pads and
defined internally (except pin RSTPD itself). The output pins are frozen at a given value.
The status of all pins during a hard power-down is shown in
Table 19.
Flags
TAutoRestart
TimerValue[7:0]
TReloadValue[7:0]
TPreScaler[4:0]
TRunning
TStartNow
TStartTxBegin
TStartTxEnd
TStopNow
TStopRxBegin
TStopRxEnd
Symbol
OSCIN
IRQ
MFIN
MFOUT
TX1
TX2
NCS
NWR
NRD
D0 to D7
ALE
A0
A1
A2
AUX
shows the related flags of the timer unit in alphabetical order.
Associated timer unit registers and flags
Signal on pins during Hard power-down
All information provided in this document is subject to legal disclaimers.
Pin
1
2
3
4
5
7
9
10
11
13 to 20
21
22
23
24
27
Rev. 3.3 — 15 March 2010
048033
Register name
TimerClock
TimerValue
TimerReload
SecondaryStatus
Control
TimerControl
TimerControl
Control
TimerControl
TimerControl
TimerClock
Type
I
O
I
O
O
O
I
I
I
I/O
I
I/O
I
I
O
Highly Integrated ISO/IEC 14443 A Reader IC
Description
not separated from input, pulled to AVSS
high-impedance
separated from input
LOW
HIGH, if bit TX1RFEn = logic 1
LOW, if bit TX1RFEn = logic 0
HIGH, only if bit TX2RFEn = logic 1 and bit
TX2Inv = logic 0
otherwise LOW
separated from input
separated from input
separated from input
separated from input
separated from input
separated from input
separated from input
separated from input
high-impedance
Table
Bit
5
7 to 0
7 to 0
4 to 0
7
1
0
1
2
2
3
19.
MFRC500
© NXP B.V. 2010. All rights reserved.
Register address
0Ch
2Ch
05h
09h
2Bh
2Bh
09h
2Bh
2Bh
2Ah
2Ah
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