PIC18F4455-I/ML Microchip Technology, PIC18F4455-I/ML Datasheet - Page 198

• Manufacturer Part Number: PIC18F4455-I/ML
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,44PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4455-I/ML

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 24KB (12K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, I2C, EAUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163025
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNI3-DB18F4550 - BOARD DAUGHTER ICEPIC3DM163025 - PIC DEM FULL SPEED USB DEMO BRD444-1001 - DEMO BOARD FOR PICMICRO MCU
• Lead Free Status / Rohs Status: Details

PIC18F2455/2550/4455/4550
TABLE 18-1:
DS39632E-page 196
SPPCON
SPPCFG
SPPEPS
SPPDATA
PIR1
PIE1
IPR1
PORTE
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used for the Streaming Parallel Port.
Note 1:
Name
2:
3:
(3)
(3)
(3)
(3)
Implemented only when Master Clear functionality is disabled (MCLRE Configuration bit = 0).
RE3 is the only PORTE bit implemented on both 28-pin and 40/44-pin devices. All other bits are
implemented only when PORTE is implemented (i.e., 40/44-pin devices).
These registers and/or bits are unimplemented on 28-pin devices.
CLKCFG1 CLKCFG0
SPPIF
SPPIE
SPPIP
RDPU
RDSPP
DATA7
Bit 7
REGISTERS ASSOCIATED WITH THE STREAMING PARALLEL PORT
—
(3)
(3)
(3)
(3)
WRSPP
DATA6
ADIE
ADIP
Bit 6
ADIF
—
—
DATA5
CSEN
RCIF
RCIE
RCIP
Bit 5
—
—
—
SPPBUSY
CLK1EN
DATA4
TXIE
TXIP
Bit 4
TXIF
—
—
RE3
ADDR3
DATA3
SSPIF
SSPIE
SSPIP
Bit 3
WS3
—
(1,2)
CCP1IF
CCP1IE
CCP1IP
ADDR2
DATA2
RE2
Bit 2
WS2
—
(3)
SPPOWN
TMR2IF
TMR2IE
TMR2IP
ADDR1
DATA1
RE1
© 2009 Microchip Technology Inc.
Bit 1
WS1
(3)
TMR1IF
TMR1IE
TMR1IP
SPPEN
ADDR0
DATA0
RE0
Bit 0
WS0
(3)
on page
Values
Reset
57
57
57
57
56
56
56
56