PIC18F4455-I/ML Microchip Technology, PIC18F4455-I/ML Datasheet - Page 20

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,44PIN,PLASTIC

PIC18F4455-I/ML

Manufacturer Part Number
PIC18F4455-I/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4455-I/ML

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
24KB (12K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI, I2C, EAUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
35
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163025
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNI3-DB18F4550 - BOARD DAUGHTER ICEPIC3DM163025 - PIC DEM FULL SPEED USB DEMO BRD444-1001 - DEMO BOARD FOR PICMICRO MCU
Lead Free Status / Rohs Status
 Details
PIC18F2455/2550/4455/4550
TABLE 1-3:
DS39632E-page 18
RB0/AN12/INT0/
FLT0/SDI/SDA
RB1/AN10/INT1/SCK/
SCL
RB2/AN8/INT2/VMO
RB3/AN9/CCP2/VPO
RB4/AN11/KBI0/CSSPP
RB5/KBI1/PGM
RB6/KBI2/PGC
RB7/KBI3/PGD
Legend: TTL = TTL compatible input
Note 1:
RB0
AN12
INT0
FLT0
SDI
SDA
RB1
AN10
INT1
SCK
SCL
RB2
AN8
INT2
VMO
RB3
AN9
CCP2
VPO
RB4
AN11
KBI0
CSSPP
RB5
KBI1
PGM
RB6
KBI2
PGC
RB7
KBI3
PGD
2:
3:
Pin Name
(1)
ST = Schmitt Trigger input with CMOS levels
O
Alternate assignment for CCP2 when CCP2MX Configuration bit is cleared.
Default assignment for CCP2 when CCP2MX Configuration bit is set.
These pins are No Connect unless the ICPRT Configuration bit is set. For NC/ICPORTS, the pin is No
Connect unless ICPRT is set and the DEBUG Configuration bit is cleared.
= Output
PIC18F4455/4550 PINOUT I/O DESCRIPTIONS (CONTINUED)
PDIP QFN TQFP
33
34
35
36
37
38
39
40
Pin Number
10
11
12
14
15
16
17
9
10
14
15
16
17
11
8
9
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Analog
Analog
Analog
Analog
Analog
Buffer
Type
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
CMOS = CMOS compatible input or output
I
P
PORTB is a bidirectional I/O port. PORTB can be software
programmed for internal weak pull-ups on all inputs.
Digital I/O.
Analog input 12.
External interrupt 0.
Enhanced PWM Fault input (ECCP1 module).
SPI data in.
I
Digital I/O.
Analog input 10.
External interrupt 1.
Synchronous serial clock input/output for SPI mode.
Synchronous serial clock input/output for I
Digital I/O.
Analog input 8.
External interrupt 2.
External USB transceiver VMO output.
Digital I/O.
Analog input 9.
Capture 2 input/Compare 2 output/PWM2 output.
External USB transceiver VPO output.
Digital I/O.
Analog input 11.
Interrupt-on-change pin.
SPP chip select control output.
Digital I/O.
Interrupt-on-change pin.
Low-Voltage ICSP™ Programming enable pin.
Digital I/O.
Interrupt-on-change pin.
In-Circuit Debugger and ICSP programming clock pin.
Digital I/O.
Interrupt-on-change pin.
In-Circuit Debugger and ICSP programming data pin.
2
C™ data I/O.
= Input
= Power
Description
© 2009 Microchip Technology Inc.
2
C mode.

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