PIC18LF8490-I/PT Microchip Technology, PIC18LF8490-I/PT Datasheet - Page 404

• Manufacturer Part Number: PIC18LF8490-I/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,80PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF8490-I/PT

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, LCD, POR, PWM, WDT
• Number Of I /o: 66
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SPI, I2C, EUSART, AUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 66
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163028
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F6390/6490/8390/8490
ID Locations ............................................................. 281, 293
INCF ................................................................................. 316
INCFSZ ............................................................................ 317
In-Circuit Debugger .......................................................... 293
In-Circuit Serial Programming (ICSP) ...................... 281, 293
Indexed Literal Offset Addressing Mode .......................... 342
Indexed Literal Offset Mode ......................................... 84, 86
Indirect Addressing ............................................................ 82
INFSNZ ............................................................................ 317
Initialization Conditions for all Registers ...................... 59–64
Instruction Cycle ................................................................. 69
Instruction Flow/Pipelining ................................................. 69
Instruction Set .................................................................. 295
DS39629C-page 402
Effect of a Reset ...................................................... 191
General Call Address Support ................................. 180
I
Master Mode ............................................................ 181
Multi-Master Communication, Bus Collision
Multi-Master Mode ................................................... 191
Operation ................................................................. 170
Read/Write Bit Information (R/W Bit) ............... 170, 171
Registers .................................................................. 166
Serial Clock (RC3/SCK/SCL) ................................... 171
Slave Mode .............................................................. 170
Sleep Operation ....................................................... 191
Stop Condition Timing .............................................. 190
Transmission ............................................................ 171
and Standard PIC18 Instructions ............................. 342
Clocking Scheme ....................................................... 69
ADDLW .................................................................... 301
ADDWF .................................................................... 301
ADDWF (Indexed Literal Offset mode) .................... 343
ADDWFC ................................................................. 302
ANDLW .................................................................... 302
ANDWF .................................................................... 303
BC ............................................................................ 303
BCF .......................................................................... 304
BN ............................................................................ 304
BNC ......................................................................... 305
BNN ......................................................................... 305
BNOV ....................................................................... 306
BNZ .......................................................................... 306
BOV ......................................................................... 309
BRA .......................................................................... 307
BSF .......................................................................... 307
BSF (Indexed Literal Offset mode) .......................... 343
BTFSC ..................................................................... 308
BTFSS ..................................................................... 308
BTG .......................................................................... 309
BZ ............................................................................ 310
CALL ........................................................................ 310
CLRF ........................................................................ 311
CLRWDT .................................................................. 311
COMF ...................................................................... 312
CPFSEQ .................................................................. 312
CPFSGT .................................................................. 313
CPFSLT ................................................................... 313
2
C Clock Rate w/BRG ............................................. 183
Operation ......................................................... 182
Reception ......................................................... 187
Repeated Start Condition Timing ..................... 186
Start Condition ................................................. 185
Transmission .................................................... 187
Transmit Sequence .......................................... 182
and Arbitration .................................................. 191
Addressing ....................................................... 170
Reception ......................................................... 171
INTCON Register
INTCON Registers ............................................................. 95
Inter-Integrated Circuit. See I
Internal Oscillator Block ..................................................... 34
Internal RC Oscillator
Internet Address .............................................................. 409
DAW ........................................................................ 314
DCFSNZ .................................................................. 315
DECF ....................................................................... 314
DECFSZ .................................................................. 315
Extended Instructions .............................................. 337
General Format ........................................................ 297
GOTO ...................................................................... 316
INCF ........................................................................ 316
INCFSZ .................................................................... 317
INFSNZ .................................................................... 317
IORLW ..................................................................... 318
IORWF ..................................................................... 318
LFSR ....................................................................... 319
MOVF ...................................................................... 319
MOVFF .................................................................... 320
MOVLB .................................................................... 320
MOVLW ................................................................... 321
MOVWF ................................................................... 321
MULLW .................................................................... 322
MULWF .................................................................... 322
NEGF ....................................................................... 323
NOP ......................................................................... 323
POP ......................................................................... 324
PUSH ....................................................................... 324
RCALL ..................................................................... 325
RESET ..................................................................... 325
RETFIE .................................................................... 326
RETLW .................................................................... 326
RETURN .................................................................. 327
RLCF ....................................................................... 327
RLNCF ..................................................................... 328
RRCF ....................................................................... 328
RRNCF .................................................................... 329
SETF ....................................................................... 329
SETF (Indexed Literal Offset mode) ........................ 343
SLEEP ..................................................................... 330
Standard Instructions ............................................... 295
SUBFWB ................................................................. 330
SUBLW .................................................................... 331
SUBWF .................................................................... 331
SUBWFB ................................................................. 332
SWAPF .................................................................... 332
TBLRD ..................................................................... 333
TBLWT .................................................................... 334
TSTFSZ ................................................................... 335
XORLW ................................................................... 335
XORWF ................................................................... 336
Summary Table ....................................................... 298
RBIF Bit ................................................................... 112
Adjustment ................................................................. 34
INTIO Modes ............................................................. 34
INTOSC Output Frequency ....................................... 34
OSCTUNE Register ................................................... 34
Use with WDT .......................................................... 287
and Using MPLAB IDE Tools .......................... 344
Considerations when Enabling ........................ 342
Syntax .............................................................. 337
© 2007 Microchip Technology Inc.
2
C.