USBN9603-28M National Semiconductor, USBN9603-28M Datasheet

USB Controller IC

USBN9603-28M

Manufacturer Part Number
USBN9603-28M
Description
USB Controller IC
Manufacturer
National Semiconductor
Datasheets

Specifications of USBN9603-28M

Interface
USB
No. Of Pins
28
Peak Reflow Compatible (260 C)
No
Supply Voltage Max
7V
Leaded Process Compatible
No
Controller Type, Ic
USB
Package / Case
28-WSOIC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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©
2000 National Semiconductor Corporation
USBN9603 Universal Serial Bus
Full Speed Function Controller with Enhanced DMA Support
General Description
The USBN9603 is an integrated, USB Node controller that
features enhanced DMA support with many automatic data
handling features. It is compatible with USB specification ver-
sions 1.0 and 1.1, and is an advanced version of the currently
available USBN9602.
A single IC integrates the required USB transceiver with a
3.3V regulator, a Serial Interface Engine (SIE), USB end-
point (EP) FIFOs, a versatile 8-bit parallel interface, a clock
generator and a MICROWIRE/PLUS™ interface. Seven
endpoint pipes are supported: one for the mandatory con-
trol endpoint and six to support interrupt, bulk and isochro-
nous endpoints. Each endpoint pipe has a dedicated FIFO,
8 bytes for the control endpoint and 64 bytes for the other
endpoints. The 8-bit parallel interface supports multiplexed
and non-multiplexed style CPU address/data buses. A pro-
grammable interrupt output scheme allows device configu-
ration for different interrupt signaling requirements.
Block Diagram
TRI-STATE
MICROWIRE/PLUS
- May 1998
®
is a registered trademark of National Semiconductor Corporation.
and MICROWIRE
Serial Interface Engine (SIE)
CS
Transceiver
Media Access Controller (MAC)
Physical Layer Interface (PHY)
D+
are trademarks of National Semiconductor Corporation.
RD
Microcontroller Interface
Endpoint/Control FIFOs
D-
WR
Upstream Port
A0/ALE D7-0/AD7-0
Outstanding Features
VReg
Low EMI, low standby current, 24 MHz oscillator
Advanced DMA mechanism
Fully static HALT mode with asynchronous wake-up
for bus powered operation
5V or 3.3V operation
Improved input range 3.3V signal voltage regulator
All unidirectional FIFOs are 64 bytes
Power-up reset and startup delay counter simplify sys-
tem design
Simple programming model controlled by external controller
Available in two packages
— USBN9603SLB: small footprint for new designs and
— USBN9603-28M: standard package, pin-to-pin com-
portable applications
patible with USBN9602-28M
USB Event
INTR
Recovery
Detect
Clock
Generator
Oscillator
24 MHz
Clock
MODE1-0
RESET
V
GND
XIN
XOUT
CLKOUT
V3.3
AGND
CC
PRELIMINARY
March 2000
www.national.com

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