NJU6624CFG1-02 NJR, NJU6624CFG1-02 Datasheet - Page 16

• Manufacturer Part Number: NJU6624CFG1-02
• Description: LCD Drivers 14-Char/1-Line Dot Mtrx LCD Cntrlr Drvr
• Manufacturer: NJR

Specifications of NJU6624CFG1-02

• Number Of Digits: 14
• Number Of Segments: 70
• Maximum Clock Frequency: 218 KHz
• Operating Supply Voltage: 2.4 V to 5.5 V
• Maximum Power Dissipation: 500 mW
• Maximum Operating Temperature: + 85 C
• Package / Case: QFP-100-G1
• Maximum Supply Current: 500 uA
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

(4-1)Description of each instructions
(4-1)Description of each instructions
(a)Maker Testing
(a)Maker Testing
(b)Clear Display
(b)Clear Display
(c)Return Home
(c)Return Home
(d)Entry Mode Set
(d)Entry Mode Set
This code is using for device testing mode ( only for maker ).
This code is using for device testing mode ( only for maker ).
Therefore, please avoid all "0" input or no meaning Enable signal input at data "0".
Therefore, please avoid all "0" input or no meaning Enable signal input at data "0".
(Especially please check the output condition of Enable signal when the power turns on.)
(Especially please check the output condition of Enable signal when the power turns on.)
When this instruction is executed, the space code (20)
When this instruction is executed, the space code (20)
address (00)
address (00)
change.
change.
Note: The character pattern for character code (20)
Note: The character pattern for character code (20)
Return home instruction is executed, the DD RAM address (00)
Return home instruction is executed, the DD RAM address (00)
returned its original position if shifted. The DD RAM contents do not change.
returned its original position if shifted. The DD RAM contents do not change.
Entry mode set instruction which sets the address moving direction and display shift On/Off, is executed when
Entry mode set instruction which sets the address moving direction and display shift On/Off, is executed when
the codes of (I/D) and (S) are written into DB
the codes of (I/D) and (S) are written into DB
(I/D) sets the address increment or decrement, and the (S) sets the whole display shift in the DD RAM writing.
(I/D) sets the address increment or decrement, and the (S) sets the whole display shift in the DD RAM writing.
(Custom font).
(Custom font).
H H
Code
Code
Code
Code
is set into the address counter and entry mode is set to increment.The S of entry mode does not
is set into the address counter and entry mode is set to increment.The S of entry mode does not
I/D
S
1
0
1
0
D15 D14 D13 D12 D11 D10 D9
D15 D14 D13 D12 D11 D10 D9
D15 D14 D13 D12 D11 D10 D9
D15 D14 D13 D12 D11 D10 D9
MS1 MS0
MS1 MS0
MS1 MS0
MS1 MS0
A d d r e s s i n c r e m e n t : T h e a d d r e s s o f t h e D D R A M o r M K R A M o r C G R A M
increment ( +1) when the write.
A d d r e s s d e c r e m e n t : T h e a d d r e s s o f t h e D D R A M o r M K R A M o r C G R A M
decrement:( -1) when the write.
Whole display shift.
The shift direction is determined by I/D.: shift to the left at I/D=1 and shift to the
right at the I/D=0.
T h e d i s p l a y d o e s n o t s h i f t w h e n w r i t i n g i n t o C G , M K R A M .
The display does not shift.
0
0
0
0
0
1
1
1
1 1
0
(I/D) and DB
(I/D) and DB
1
1
1
0
0
0
1
H H
must be blank code in the user-defined character pattern
must be blank code in the user-defined character pattern
F u n c\ t i o n
H H
F u n c t i o n
0
0
0
1
is written into every DD RAM address, the DD RAM
is written into every DD RAM address, the DD RAM
0 0
(S), as shown below.
(S), as shown below.
D8
D8
D8
D8
0
1
1
1
H H
is set into the address counter. Display is
is set into the address counter. Display is
D7
D7
D7
D7
*
*
*
*
D6
D6
D6
D6
*
*
*
*
D5
D5
D5
D5
*
*
*
*
NJU6624A/B
NJU6624A/B
D4
D4
D4
D4
*
*
*
*
D3
D3
D3
D3
*
*
*
*
D2
D2
D2
D2
*
*
*
*
D1
D1
D1
D1
I/D
*
*
*
D0
D0
D0
D0
S
*
*
*