ADSP-21061LKSZ-176 Analog Devices Inc, ADSP-21061LKSZ-176 Datasheet - Page 7

• Manufacturer Part Number: ADSP-21061LKSZ-176
• Description: ADSP-21061L 44Hz, 3V SHARC
• Manufacturer: Analog Devices Inc
• Series: SHARC®r
• Type: Floating Pointr

Specifications of ADSP-21061LKSZ-176

• Interface: Synchronous Serial Port (SSP)
• Clock Rate: 44MHz
• Non-volatile Memory: External
• On-chip Ram: 128kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 240-MQFP, 240-PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Six channels of DMA are available on the ADSP-21061—four
via the serial ports, and two via the processor’s external port (for
either host processor, other ADSP-21061s, memory or I/O
transfers). Programs can be downloaded to the ADSP-21061
using DMA transfers. Asynchronous off-chip peripherals can
control two DMA channels using DMA request/grant lines
(DMAR
generation upon completion of DMA transfers and DMA
chaining for automatic linked DMA transfers.
Serial Ports
The ADSP-21061 features two synchronous serial ports that
provide an inexpensive interface to a wide variety of digital and
mixed-signal peripheral devices. The serial ports can operate at
the full clock rate of the processor, providing each with a maxi-
mum data rate of 40 Mbps. Independent transmit and receive
functions provide greater flexibility for serial communications.
Serial port data can be automatically transferred to and from
on-chip memory via DMA. Each of the serial ports offers TDM
multichannel mode.
1–2
, DMAG
MULTIPROCESSOR
MEMORY
SPACE
INTERNAL
MEMORY
SPACE
1–2
). Other DMA features include interrupt
NORMAL WORD ADDRESSING
48-BIT INSTRUCTION WORDS)
SHORT WORD ADDRESSING
INTERNAL MEMORY SPACE
INTERNAL MEMORY SPACE
INTERNAL MEMORY SPACE
INTERNAL MEMORY SPACE
INTERNAL MEMORY SPACE
INTERNAL MEMORY SPACE
(16-BIT DATA WORDS)
(32-BIT DATA WORDS
TO ALL ADSP-21061s
BROADCAST WRITE
IOP REGISTERS
WITH ID = 001
WITH ID = 010
WITH ID = 011
WITH ID = 100
WITH ID = 101
WITH ID = 110
Rev. C | Page 7 of 56 | July 2007
Figure 4. Memory Map
0x0000 0000
0x0002 0000
0x0004 0000
0x0008 0000
0x0010 0000
0x0018 0000
0x0012 0000
0x0028 0000
0x0030 0000
0x0038 0000
0x003F FFFF
ADDRESS
The serial ports can operate with little-endian or big-endian
transmission formats, with word lengths selectable from 3 bits
to 32 bits. They offer selectable synchronization and transmit
modes as well as optional μ-law or A-law companding. Serial
port clocks and frame syncs can be internally or externally gen-
erated. The serial ports also include keyword and key mask
features to enhance interprocessor communication.
Multiprocessing
The ADSP-21061 offers powerful features tailored to multipro-
cessor DSP systems. The unified address space (see
allows direct interprocessor accesses of each ADSP-21061’s
internal memory. Distributed bus arbitration logic is included
on-chip for simple, glueless connection of systems containing
up to six ADSP-21061s and a host processor. Master processor
changeover incurs only one cycle of overhead. Bus arbitration is
selectable as either fixed or rotating priority. Bus lock allows
indivisible read-modify-write sequences for semaphores. A vec-
tor interrupt is provided for interprocessor commands. Maxi-
mum throughput for interprocessor data transfer is 500 Mbps
over the external port. Broadcast writes allow simultaneous
transmission of data to all ADSP-21061s and can be used to
implement reflective semaphores.
EXTERNAL
MEMORY
SPACE
NOTE: BANK SIZES ARE SELECTED BY
MSIZE BITS OF THE SYSCON REGISTER
ADSP-21061/ADSP-21061L
NONBANKED
(OPTIONAL)
BANK 0
BANK 1
BANK 2
BANK 3
SDRAM
ADDRESS
0x0040 0000
0x0FFF FFFF
MS0
MS1
MS2
MS3
Figure
4)