PIC18F14K22-E/ML Microchip Technology, PIC18F14K22-E/ML Datasheet - Page 230

• Manufacturer Part Number: PIC18F14K22-E/ML
• Description: 16KB Flash, 512bytes RAM, 256bytes EEPROM, 16MIPS, 1.8-5.5V Operation 20 QFN 4x4
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F14K22-E/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F1XK22/LF1XK22
17.8
There are four additional comparator features:
• Simultaneous read of comparator outputs
• Internal reference selection
• Hysteresis selection
• Output Synchronization
17.8.1
The MC1OUT and MC2OUT bits of the CM2CON1
register are mirror copies of both comparator outputs.
The ability to read both outputs simultaneously from a
single register eliminates the timing skew of reading
separate registers.
17.8.2
There are two internal voltage references available to
the non-inverting input of each comparator. One of
these is the Fixed Voltage Reference (FVR) and the
other is the variable Comparator Voltage Reference
(CV
determines which of these references is routed to the
Comparator Voltage reference output (C
ther routing to the comparator is accomplished by the
CxR bit of the CMxCON0 register. See Section 20.1
“Voltage Reference” and Figure 17-2 and Figure 17-3
for more detail.
DS41365D-page 230
Note 1: Obtaining the status of C1OUT or C2OUT
REF
). The CxRSEL bit of the CM2CON register
Additional Comparator Features
SIMULTANEOUS COMPARATOR
OUTPUT READ
INTERNAL REFERENCE
SELECTION
by reading CM2CON1 does not affect the
comparator interrupt mismatch registers.
X
V
REF
). Fur-
Preliminary
17.8.3
The Comparator Cx have selectable hysteresis. The
hysteresis can be enabled by setting the CxHYS bit of
the CM2CON1 register. See Section 25.0 “Electrical
Specifications” for more details.
17.8.4
The Comparator Cx output can be synchronized with
Timer1 by setting the CxSYNC bit of the CM2CON1
register. When enabled, the Cx output is latched on
the rising edge of the Timer1 source clock. If a pres-
caler is used with Timer1, the comparator output is
latched after the prescaling function. To prevent a
race condition, the comparator output is latched on
the rising edge of the Timer1 clock source and Timer1
increments on the rising edge of its clock source. See
the Comparator Block Diagram (Figure 17-2 and
Figure 17-3)
(Figure 17-2) for more information.
COMPARATOR HYSTERESIS
SYNCHRONIZING COMPARATOR
OUTPUT TO TIMER 1
and
the
 2010 Microchip Technology Inc.
Timer1
Block
Diagram