S25FL128P0XMFI011 Spansion Inc., S25FL128P0XMFI011 Datasheet - Page 34

• Manufacturer Part Number: S25FL128P0XMFI011
• Description: IC 128M CMOS 3V/104MHZ SPI BUS INTERFACE
• Manufacturer: Spansion Inc.

11.11 Bulk Erase (BE: C7h, 60h)
34
The Bulk Erase (BE) command sets all the bits within the entire memory array to logic 1s. A WREN command
is required prior to writing the PP command.
For 64 KB sector devices, the bulk erase command may be written as either C7h or 60h. For 256 KB sector
devices, only the C7h command is valid.
The host system must drive CS# low, and then write the BE command on SI. CS# must be driven low for the
entire duration of the BE sequence. The command sequence is shown in
The host system must drive CS# high after the device has latched the 8th bit of the CE command, otherwise
the device does not execute the command. The BE operation begins as soon as CS# is driven high. The
device internally controls the timing of the operation, which requires a period of t
be read to check the value of the Write In Progress (WIP) bit while the BE operation is in progress. The WIP
bit is 1 during the BE operation, and is 0 when the operation is completed. The device internally resets the
Write Enable Latch to 0 before the operation completes (the exact timing is not specified).
The device only executes a BE command if all Block Protect bits (BP2:BP0 or BP3:BP0) are 0 (see
on page
13). Otherwise, the device ignores the command.
SO/PO[7-0]
SCK
CS#
SI
Figure 11.17 Bulk Erase (BE) Command Sequence
Hi-Z
Mode 3
Mode 0
D a t a
S25FL128P
S h e e t
0
1
( P r e l i m i n a r y )
2
Command
3
4
5
Figure 11.17
6
7
S25FL128P_00_04 July 2, 2007
BE
. The Status Register may
and
Table
11.6.
Table 7.1