SAA4956TJ NXP Semiconductors, SAA4956TJ Datasheet - Page 5

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SAA4956TJ

Manufacturer Part Number
SAA4956TJ
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAA4956TJ

Operating Temperature (max)
70C
Operating Temperature (min)
0C
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Supplier Unconfirmed

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SAA4956TJ-V1T3
Quantity:
9 500
Part Number:
SAA4956TJ/V1
Manufacturer:
PHILIPS/飞利浦
Quantity:
20 000
Philips Semiconductors
5
1998 Dec 08
handbook, full pagewidth
2.9-Mbit field memory with noise reduction
Pin 21 (V
instead of 3.3 V. Pins 19 and 22 (V
BLOCK DIAGRAM
3.3 V
V DD(O)
V DD(P)
100 nF
OGND
GND
V DD
DD(P)
D0 (V0) to D11 (Y7)
) should be connected to the supply voltage of the driving circuit that generates the input voltages. This could be, for instance, 5.0 V
19
21
22
2
39
12
DATA INPUT AND
REDUCTION
DATA MUX
BUFFER ( 13)
WRITE MASK
12
NOISE
14 to 3
12
12
I
D-field delay
2
C-bus control
12
1
IE
REGISTER
12
READ2
18
WRITE REGISTER
DD
12-WORD ( 12)
Q0 (V0) to Q11 (Y7)
12
1
MINI CACHE
DATA OUTPUT
NREN
BUFFER ( 12)
and V
DATA MUX
12
DATA
1
MUX
40
INTERFACE
REGISTER
I
DD(O)
2
PARALLEL READ2 REGISTER
READ
C-BUS
SCL
SERIAL READ2 REGISTER
27 to 38
12
1
) require a 3.3 V supply.
20-WORD ( 12)
20-WORD ( 12)
12
SDA
D0 internal
IE internal
mini cache write/read2 control
20
Fig.1 Block diagram.
20
20
PARALLEL WRITE REGISTER
OE
internal
SERIAL WRITE REGISTER
12
12
245760-WORD ( 12)
MEMORY ARRAY
20-WORD ( 13)
20-WORD ( 13)
mini cache read control
OE
WE
23
INPUT BUFFER
17
5
INPUT BUFFER
RE
RSTW SWCK
20
20
( 3)
24
PARALLEL READ REGISTER
( 4)
16
SERIAL READ REGISTER
RSTR SRCK
(12
(12
cache transfer
20-WORD ( 12)
20-WORD ( 12)
25
1)
1)
15
3
26
3
control
20
20
read2
internal
IE
12
12
SERIAL WRITE/READ2 CONTROLLER
control
control
write
read
ARBITRATION
SERIAL READ CONTROLLER
MEMORY
LOGIC
read2
acknowledge
read
acknowledge
SAA4956TJ
OSCILLATOR
load write
address
refresh
clock
CLOCK
Preliminary specification
REFRESH ADDRESS
block
internal
READ2 ADDRESS
WRITE ADDRESS
READ ADDRESS
OE
SAA4956TJ
COUNTER
COUNTER
COUNTER
COUNTER
write
acknowledge
internal
load read
block
address
D0
internal
IE
MGR687

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