LPC47M107S-MS Standard Microsystems (SMSC), LPC47M107S-MS Datasheet - Page 156

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LPC47M107S-MS

Manufacturer Part Number
LPC47M107S-MS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LPC47M107S-MS

Pin Count
100
Lead Free Status / RoHS Status
Compliant

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Note 1: To properly share and IRQ,
UART IRQs will assert when either UART generates an interrupt.
Serial Port 1
Mode Register
Default = 0x00
on VCC POR,
VTR POR and
HARD RESET
Serial Port 2
Mode Register
Default = 0x00
on VCC POR,
VTR POR and
HARD RESET
1. Configure UART1 (or UART2) to use the desired IRQ.
2. Configure UART2 (or UART1) to use No IRQ selected.
3. Set the share IRQ bit.
Note: If both UARTs are configured to use different IRQs and the share IRQ bit is set,
NAME
NAME
Table 71 - Serial Port 2, Logical Device 5 [Logical Device Number = 0x05]
Table 70 - Serial Port 1, Logical Device 4 [Logical Device Number = 0x04]
REG INDEX
REG INDEX
0xF0 R/W
0xF0 R/W
Bit[0] MIDI Mode
= 0
= 1
Bit[1] High Speed
= 0
= 1
Bit[6:2] Reserved, set to zero
Bit[7]: Share IRQ
=0 UARTS use different IRQs
=1 UARTS share a common IRQ
See Note 1 below.
Bit[0] MIDI Mode
= 0
= 1
Bit[1] High Speed
= 0
= 1
Bit[4:2] Reserved, set to zero
Bit[5] TXD2_MODE (Note 1)
=0
=1
Bits[7:6] Reserved. Set to zero.
UART Interrupt Operation
Page 156
MIDI support disabled (default)
MIDI support enabled
High Speed Disabled(default)
High Speed Enabled
MIDI support disabled (default)
MIDI support enabled
High Speed disabled(default)
High Speed enabled
The inactive state of the TXD2 pin is low
The state of the TXD2 pin is tristate
DEFINITION
DEFINITION
then both of the
STATE
STATE
C
C

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