LPC47M107S-MS Standard Microsystems (SMSC), LPC47M107S-MS Datasheet - Page 174
LPC47M107S-MS
Manufacturer Part Number
LPC47M107S-MS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LPC47M107S-MS.pdf
(188 pages)
Specifications of LPC47M107S-MS
Pin Count
100
Lead Free Status / RoHS Status
Compliant
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Note 1: Maximum value only applies if there is room in the FIFO and terminal count has not been received. ECP can
Note 2: nACK is not considered asserted or deasserted until it is stable for a minimum of 75 to 130 ns.
NAME
t1
t2
t3
t4
t5
t6
PD<7:0>
stall by keeping nALF low.
nACK
nALF
PDATA Valid to nACK Asserted
nALF Asserted to PDATA Changed
nACK Asserted to nALF Deasserted
(Notes 1,2)
nACK Deasserted to nALF Asserted (Note 2)
nALF Asserted to nACK Asserted
nALF Deasserted to nACK Deasserted
FIGURE 24 - ECP PARALLEL PORT REVERSE TIMING
DESCRIPTION
t4
t1
t5
Page 174
t3
t6
MIN
t4
80
80
0
0
0
0
t2
TYP
MAX
200
200
UNITS
ns
ns
ns
ns
ns
ns
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