ISP1183BSTM STEricsson, ISP1183BSTM Datasheet - Page 12

• Manufacturer Part Number: ISP1183BSTM
• Manufacturer: STEricsson

Specifications of ISP1183BSTM

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / RoHS Status: Compliant

8. Interrupts
ISP1183_3
Product data sheet
A hardware reset disables all USB endpoints and clears all Endpoint Configuration
Registers (ECRs), except for the control endpoint that is fixed and always enabled.
Section 9.3
Figure 8
logged in a status bit of the Interrupt register. Corresponding bits in the Interrupt Enable
register determine whether an event will generate an interrupt.
Interrupts can be masked globally using bit INTENA of the Mode register (see
The signaling mode of output INT_N is controlled by bit INTLVL of the Hardware
Configuration register (see
pulse mode is selected, a pulse of 166 ns is generated when the OR-ed combination of all
interrupt bits changes from logic 0 to logic 1.
Fig 7. Clock with respect to the external POR
Stable external clock available at A.
shows the interrupt logic of the ISP1183. Each of the indicated USB events is
explains how to initialize and re-initialize endpoints.
Rev. 03 — 20 January 2009
EXTERNAL CLOCK
Table
POR
20). Default settings after reset is level mode. When
Low-power USB Peripheral Controller with DMA
A
004aaa365
© ST-NXP Wireless 2009. All rights reserved.
ISP1183
Table
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18).