ISP1183BSTM STEricsson, ISP1183BSTM Datasheet - Page 17

• Manufacturer Part Number: ISP1183BSTM
• Manufacturer: STEricsson

Specifications of ISP1183BSTM

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / RoHS Status: Compliant

10. DMA transfer
ISP1183_3
Product data sheet
10.1 Selecting an endpoint for DMA transfer
Direct Memory Access (DMA) is a method to transfer data from one location to another in
a computer system, without intervention of the CPU. Many implementations of DMA exist.
The ISP1183 supports two methods:
The ISP1183 supports DMA transfer for all 14 configurable endpoints (see
one endpoint can be selected at a time for DMA transfer. The DMA operation of the
ISP1183 can be interleaved with normal I/O mode access to other endpoints.
The following features are supported:
The target endpoint for DMA access is selected through bits EPDIX[3:0] in the DMA
Configuration register, see
set by bit EPDIR in the associated ECR, to match the selected endpoint type (OUT
endpoint: read; IN endpoint: write).
Asserting input DACK automatically selects the endpoint specified in the DMA
Configuration register, regardless of the current endpoint used for the I/O mode access.
Table 7.
Endpoint identifier
1
2
3
4
5
6
7
8
9
10
11
12
13
14
•
•
•
•
•
8237 compatible mode: based on the DMA subsystem of the IBM personal
computers (PC, AT and all its successors and clones); this architecture uses the Intel
8237 DMA controller and has separate address spaces for memory and I/O
DACK-only mode: based on the DMA implementation in some embedded RISC
processors, which has a single address space for both memory and I/O
Single-cycle or burst transfers (up to 16 bytes per cycle)
Programmable transfer direction (read or write)
Programmable signal levels on pins DREQ and DACK
Endpoint selection for the DMA transfer
Rev. 03 — 20 January 2009
EPDIX[3:0]
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Table
7. The transfer direction (read or write) is automatically
Low-power USB Peripheral Controller with DMA
Transfer direction
EPDIR = 0
OUT: read
OUT: read
OUT: read
OUT: read
OUT: read
OUT: read
OUT: read
OUT: read
OUT: read
OUT: read
OUT: read
OUT: read
OUT: read
OUT: read
EPDIR = 1
IN: write
IN: write
IN: write
IN: write
IN: write
IN: write
IN: write
IN: write
IN: write
IN: write
IN: write
IN: write
IN: write
IN: write
© ST-NXP Wireless 2009. All rights reserved.
ISP1183
Table
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