ISP1181BBS,551 NXP Semiconductors, ISP1181BBS,551 Datasheet - Page 39
ISP1181BBS,551
Manufacturer Part Number
ISP1181BBS,551
Description
Manufacturer
NXP Semiconductors
Datasheet
1.ISP1181BBS551.pdf
(73 pages)
Specifications of ISP1181BBS,551
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Lead Free Status / RoHS Status
Compliant
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Table 40.
Table 42.
[1]
ISP1181B_3
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Reset value undefined after a bus reset.
[1]
[1]
Scratch Information Register: bit allocation
Frame Number Register: bit allocation
12.3.4 Read Frame Number
reserved
R/W
R/W
15
15
R
R
0
7
0
0
7
0
Transaction — write/read 2 bytes
Table 41.
This command returns the frame number of the last successfully received SOF. It is
followed by reading one or two bytes from the Frame Number Register, containing the
frame number (lower byte first). The Frame Number Register is shown in
Remark: After a bus reset, the value of the Frame Number Register is undefined.
Code (Hex): B4 — read frame number
Transaction — read 1 or 2 bytes
Table 43.
Bit
15
14 to 8
7 to 0
Bit
15 to 11
10 to 8
7 to 0
R/W
R/W
14
14
R
R
0
6
0
0
6
0
Scratch Information Register: bit description
Frame Number Register: bit description
Symbol
-
SFIRH[6:0]
SFIRL[7:0]
Symbol
-
SOFRH[2:0]
SOFRL[7:0]
reserved
R/W
R/W
13
13
R
R
0
5
0
0
5
0
Rev. 03 — 23 January 2009
Description
reserved; must be logic 0
Scratch Information Register (high byte)
Scratch Information Register (low byte)
Description
reserved
SOF frame number (upper byte)
SOF frame number (lower byte)
R/W
R/W
12
12
R
R
0
4
0
0
4
0
SOFRL[7:0]
SFIRL[7:0]
SFIRH[6:0]
R/W
R/W
11
11
R
R
0
3
0
0
3
0
Full-speed USB peripheral controller
R/W
R/W
10
10
R
R
0
2
0
0
2
0
SOFRH[2:0]
© ST-NXP Wireless 2009. All rights reserved.
R/W
R/W
ISP1181B
R
R
9
0
1
0
9
0
1
0
Table
42.
R/W
R/W
R
R
8
0
0
0
8
0
0
0
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