ISP1181BBS,551 NXP Semiconductors, ISP1181BBS,551 Datasheet - Page 45
ISP1181BBS,551
Manufacturer Part Number
ISP1181BBS,551
Description
Manufacturer
NXP Semiconductors
Datasheet
1.ISP1181BBS551.pdf
(73 pages)
Specifications of ISP1181BBS,551
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Lead Free Status / RoHS Status
Compliant
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16. Power-on reset
ISP1181B_3
Product data sheet
The ISP1181B has an internal power-on reset (POR) circuit. Input pin RESET can be
directly connected to V
power-on and normally requires 3 to 4 ms to stabilize.
The triggering voltage of the POR circuit is 2.0 V nominal. A POR is automatically
generated when V
A hardware reset disables all USB endpoints and clears all ECRs, except for the control
endpoint which is fixed and always enabled.
endpoints.
Fig 14. Power-on reset timing.
(1) Supply voltage (5 V or 3.3 V), connected externally to pin RESET.
t
t
t
1
2
3
: clock is running
: BUS_CONF pins are sampled
: registers are accessible
V CC (1)
2.0 V
0 V
CC
goes below the trigger voltage for a duration longer than 50 s.
Rev. 03 — 23 January 2009
CC
. The clock signal on output CLKOUT starts 0.5 ms after
50 s
POR
350 s
t 1
Section 9.3
1 ms
Full-speed USB peripheral controller
t 2
explains how to (re-)initialize the
1 ms
© ST-NXP Wireless 2009. All rights reserved.
ISP1181B
MGT026
t 3
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