CY8C5386LTI-005 Cypress Semiconductor Corp, CY8C5386LTI-005 Datasheet - Page 38

• Manufacturer Part Number: CY8C5386LTI-005
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY8C5386LTI-005

• Lead Free Status / RoHS Status: Compliant

7.2.2 Datapath Module
The datapath contains an 8-bit single cycle ALU, with associated
compare and condition generation logic. This datapath block is
7.2.2.6 Working Registers
The datapath contains six primary working registers, which are
accessed by CPU firmware or DMA during normal operation.
Table 7-1. Working Datapath Registers
Document Number: 001-55035 Rev. *F
A0 and A1 Accumulators
D0 and D1 Data Registers
F0 and F1 FIFOs
Programmable
Name
Input from
Routing
(to/from Programmable Routing)
Parallel Input/Output
Function
6
Muxes
Input
These are sources and sinks for
the ALU and also sources for the
compares.
These are sources for the ALU
and sources for the compares.
These are the primary interface
to the system bus. They can be a
data source for the data registers
and accumulators or they can
capture data from the accumu-
lators or ALU. Each FIFO is four
bytes deep.
PI
PO
Description
PRELIMINARY
Figure 7-8. Datapath Top Level
PHUB System Bus
Data Registers
Accumulators
FIFOs
Mask
ALU
Shift
F1
F0
D1
D0
A1
A0
R/W Access to All
Registers
optimized to implement embedded functions, such as timers,
counters, integrators, PWMs, PRS, CRC, shifters and dead band
generators and many others.
7.2.2.7 Dynamic Datapath Configuration RAM
Dynamic configuration is the ability to change the datapath
function and internal configuration on a cycle-by-cycle basis,
under sequencer control. This is implemented using the 8-word
x 16-bit configuration RAM, which stores eight unique 16-bit wide
configurations. The address input to this RAM controls the
sequence, and can be routed from any block connected to the
UDB routing matrix, most typically PLD logic, I/O pins, or from
the outputs of this or other datapath blocks.
ALU
The ALU performs eight general purpose functions. They are:
Increment
Decrement
Add
Subtract
Logical AND
PSoC
®
5: CY8C53 Family Data Sheet
Datapath
Previous
To/From
D0
D1
A0
A1
Chaining
Output
Muxes
To/From
Next
Datapath
6
Output to
Programmable
Routing
Page 38 of 97
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