LE58QL02FJC Zarlink, LE58QL02FJC Datasheet - Page 22

• Manufacturer Part Number: LE58QL02FJC
• Description: SLIC 4-CH 3.3V 44-Pin PLCC Tube
• Manufacturer: Zarlink

Specifications of LE58QL02FJC

• Package: 44PLCC
• Number Of Channels Per Chip: 4
• Minimum Operating Supply Voltage: 3.135 V
• Typical Operating Supply Voltage: 3.3 V

SWITCHING CHARACTERISTICS
The following are the switching characteristics over operating range (unless otherwise noted). Min and max values are valid for
all digital outputs with a 115 pF load, except CD1–C5 with a 30 pF load. (See Figure 15 and Figure 16 for the microprocessor
interface timing diagrams.)
Microprocessor Interface
PCM Interface
PCLK not to exceed 8.192 MHz.
Pull-up resistors to V
diagrams.)
No.
No.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
30
31
32
33
34
35
36
1
2
3
4
5
6
7
8
9
Symbol
CCD
Symbol
t
t
t
t
t
t
t
t
t
t
t
OCSH
OCSO
t
t
ODOF
t
t
t
t
t
t
OCSS
OCSL
t
t
t
t
t
t
t
t
t
t
t
t
t
t
ICSS
ICSH
ICSO
t
t
DCH
DCR
ICSL
ODD
ODH
ODC
DRH
DCY
DCL
DCF
OLH
RST
PCY
PCH
PCL
PCF
PCR
FSS
FSH
TSD
TSO
DXD
DXH
DXZ
DRS
IDS
IDH
of 240 Ω are attached to TSCA and TSCB. (See Figure 17 and Figure 18 for the PCM interface timing
Data clock period
Data clock HIGH pulse width
Data clock LOW pulse width
Rise time of clock
Fall time of clock
Chip select setup time, Input mode
Chip select hold time, Input mode
Chip select pulse width, Input mode
Chip select off time, Input mode
Input data setup time
Input data hold time
SLIC device output latch valid
Chip select setup time, Output mode
Chip select hold time, Output mode
Chip select pulse width, Output mode
Chip select off time, Output mode
Output data turn on delay
Output data hold time
Output data turn off delay
Output data valid
Reset pulse width
PCM clock period
PCM clock HIGH pulse width
PCM clock LOW pulse width
Fall time of clock
Rise time of clock
FS setup time
FS hold time
Delay to TSC valid
Delay to TSC off
PCM data output delay
PCM data output hold time
PCM data output delay to High-Z
PCM data input setup time
PCM data input hold time
Parameter
Parameter
Zarlink Semiconductor Inc.
22
Min.
2500
2500
122
Min
122
48
48
25
50
25
48
48
30
25
30
30
50
5
5
5
5
5
5
0
0
3
8t
8t
Typ
Typ
DCY
DCY
t
t
t
t
t
DCY
DCH
DCY
DCH
PCY
2500
Max
Max
25
25
50
50
50
15
15
80
80
70
70
70
–10
–10
–30
–20
–20
Unit
Unit
ns
µs
ns
Note
Note
4, 5
1
1
2
3
4