SI5366-C-GQR Silicon Laboratories Inc, SI5366-C-GQR Datasheet - Page 2

• Manufacturer Part Number: SI5366-C-GQR
• Description: IC CLOCK MULTIPLIER PREC 100TQFP
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5366-C-GQR

• Input: *
• Output: *
• Frequency - Max: *
• Voltage - Supply: *
• Operating Temperature: *
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Frequency-max: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Si5366
Table 1. Performance Specifications
(V
2
Temperature Range
Supply Voltage
Supply Current
Input Clock Frequency
(CKIN1, CKIN2, CKIN3,
CKIN4)
Input Clock Frequency
(CKIN3, CKIN4 used as
FSYNC inputs)
Output Clock Frequency
(CKOUT1, CKOUT2,
CKOUT3, CKOUT4,
CKOUT5 used as fifth
high-speed output)
CKOUT5 used as frame
sync output (FS_OUT)
3-Level Input Pins
Input Mid Current
Input Clocks (CKIN1, CKIN2, CKIN3, CKIN4)
Differential Voltage Swing
Common Mode Voltage
Rise/Fall Time
Duty Cycle
(Minimum Pulse Width)
Output Clocks (CKOUT1, CKOUT2, CKOUT3, CKOUT4, CKOUT5/FS_OUT)
Common Mode
Differential Output Swing
Single Ended Output
Swing
Rise/Fall Time
Notes:
DD
1. For a more comprehensive listing of device specifications, please consult the Silicon Laboratories Any-Rate Precision
2. This is the amount of leakage that the 3 level input can tolerate from an external driver. See the Family Reference
= 1.8 ±5% or 2.5 V ±10%, T
Clock Family Reference Manual. This document can be downloaded from
Documentation)
Manual. In most designs, an external resistor voltage divider is recommended.
Parameter
.
CKN
CKN
CKN
CKO
Symbol
CKN
A
V
CK
CK
V
CK
CK
I
V
V
= –40 to 85 ºC)
I
IMM
OCM
T
DD
OD
DD
SE
A
OF
OF
VCM
DPP
TRF
TRF
F
F
DC
tings. Consult Silicon Laborato-
ing
Input frequency and clock mul-
DSPLLsim or Any-Rate Preci-
tiplication ratio pin-selectable
Manual at
sion Clock Family Reference
FRQSEL and FRQTBL set-
ries configuration software
from table of values using
(click on Documentation) for
Only CKOUT1 enabled
Only CKOUT1 enabled
LVPECL format output
All CKOUTs enabled
All CKOUTs enabled
CMOS format output
Whichever is smaller
Tristate/Sleep Mode
f
OUT
f
OUT
table selections.
Test Condition
Preliminary Rev. 0.3
See Note 2.
2.5 V ±10%
100 Ω load
1.8 V ±5%
line-to-line
= 622.08 MHz
LVPECL
20–80%
20–80%
= 19.44 MHz
www.silabs.com/tim-
V
www.silabs.com/timing
DD
0.008
0.008
0.008
0.008
2.25
1.71
0.25
Min
–40
0.9
1.0
1.1
0.5
–2
40
—
—
—
—
—
—
– 1.42
2
Typ
394
253
278
229
165
230
2.5
1.8
25
—
—
—
—
—
—
—
—
—
—
—
—
—
—
V
(click on
1049.76
DD
707.35
TBD
Max
2.75
1.89
0.93
435
284
321
261
350
1.9
1.4
1.7
1.9
85
60
—
—
11
—
– 1.25
2
MHz
MHz
MHz
MHz
Unit
V
mA
mA
mA
mA
mA
µA
ºC
ns
ns
ps
%
V
V
V
V
V
V
V
PP