SI5366-C-GQR Silicon Laboratories Inc, SI5366-C-GQR Datasheet - Page 5

• Manufacturer Part Number: SI5366-C-GQR
• Description: IC CLOCK MULTIPLIER PREC 100TQFP
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5366-C-GQR

• Input: *
• Output: *
• Frequency - Max: *
• Voltage - Supply: *
• Operating Temperature: *
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Frequency-max: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Crystal/Ref Clk Rate
Input Clock Configuration
Control
Manual/Automatic Clock
Selection (L)
Input Clock Select
Frequency Offset Control
Frequency Table Select
Frequency Select
Bandwidth Select
Skew Increment
Skew Decrement
Signal Format Select
CKOUT3 and CKOUT4
Divider Control
Clock Output 2 Disable/
Bypass Mode Control
Clock Outputs 3 and 4
Disable
FS_OUT Disable
FSYNC Inputs to Clock
Selection Enable
FSYNC Realignment
Control
Reset
Input
Clock
Sources
1
130 Ω
130 Ω
82 Ω
82 Ω
15 kΩ
15 kΩ
15 kΩ
15 kΩ
15 kΩ
15 kΩ
15 kΩ
15 kΩ
15 kΩ
15 kΩ
V
V
DD
DD
= 3.3 V
= 3.3 V
V
V
V
V
V
DD
DD
DD
DD
DD
V
V
V
V
V
DD
15 kΩ
15 kΩ
DD
15 kΩ
15 kΩ
DD
15 kΩ
15 kΩ
DD
15 kΩ
15 kΩ
DD
15 kΩ
15 kΩ
System
130 Ω
130 Ω
Supply
82 Ω
82 Ω
Power
Notes:
Figure 2. Si5366 Typical Application Circuit
1. Assumes differential LVPECL termination (3.3 V) on clock inputs.
2. Denotes tri-level input pins with states designated as L (ground), M (VDD/2), and H (VDD).
3. Assumes manual input clock selection.
CKIN1+
CKIN1–
CKIN4+
CKIN4–
RATE
CK_CONF
AUTOSEL
CKSEL[1:0]
FOS_CTL
FRQTBL
FRQSEL[3:0]
BWSEL[1:0]
INC
DEC
SFOUT[1:0]
DIV34_[1:0]
DBL2_BY
DBL34
DBL_FS
FS_SW
FS_ALIGN
RST
Ferrite
Bead
2
2
2
2
2
2
3
2
2
2
2
0.1 µF
1 µF
C
C
1–9
10
Preliminary Rev. 0.3
Si5366
Option 1:
Crystal
Refclk+
CKOUT5/FS_OUT+
CKOUT5/FS_OUT–
Ext.
0.1 µF
Option 2:
ALRMOUT
CKOUT1+
CKOUT1–
CKOUT4+
CKOUT4–
Refclk–
CKnB
Ext.
LOL
0.1 µF
0.1 µF
0.1 µF
0.1 µF
0.1 µF
0.1 µF
0.1 µF
100 Ω
100 Ω
100 Ω
Alarm Output Indicator
CKINn Invalid Indicator
(n = 1 to 3)
PLL Loss of Lock
Indicator
+
–
+
–
+
–
Si5366
Outputs
Clock
5