SI5366-C-GQR Silicon Laboratories Inc, SI5366-C-GQR Datasheet - Page 9

• Manufacturer Part Number: SI5366-C-GQR
• Description: IC CLOCK MULTIPLIER PREC 100TQFP
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5366-C-GQR

• Input: *
• Output: *
• Frequency - Max: *
• Voltage - Supply: *
• Operating Temperature: *
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Frequency-max: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pin #
12
13
57
16
17
20
21
ALRMOUT
FS_ALIGN
Pin Name
CS0_C3A
CS1_C4A
FS_SW
XA
XB
Table 3. Si5366 Pin Descriptions (Continued)
I/O
I/O
O
I
I
I
Signal Level
LVCMOS
ANALOG
LVCMOS
LVCMOS
LVCMO
Preliminary Rev. 0.3
Alarm Output Indicator.
This pin is an active high alarm output associated with CKIN4
or the frame sync alignment alarm.
0 = ALRMOUT not active.
1 = ALRMOUT active.
Input Clock Select/CKINn Active Clock Indicator.
Input: If manual clock selection mode is chosen
Output: If automatic clock detection is chosen (AUTOSEL = M
External Crystal or Reference Clock.
An external crystal or an external clock should be connected to
these pins. Frequency of crystal or external clock is set by the
RATE pins. The quality of the selected crystal or external clock
affects the quality of the part's output; refer to the Family Refer-
ence Manual for external reference selection and interfacing.
FSYNC Inputs to Clock Selection Enable.
If CK_CONF = 1, this pin enables the use of the CKIN3 and
CKIN4 loss-of-signal indicators as inputs to the clock selection
state machine.
0 = Do not use CKIN3 and CKIN4 LOS indicators as inputs to
the clock selection state machine.
1 = Use CKIN3 and CKIN4 LOS indicators as inputs to the
clock selection state machine.
This pin has a weak pull-down.
FSYNC Alignment Control.
If CK_CONF = 1, a logic high on this pin causes the FS_OUT
phase to be realigned to the rising edge of the currently active
input sync (CKIN3 or CKIN4).
0 = No realignment.
1 = Realignment.
This pin has a weak pull-down.
These inputs are internally deglitched to prevent inad-
vertent clock switching during changes in the CSn input
state. If configured as input, these pins must not float.
(AUTOSEL = L), the CS[1:0] pins function as the man-
ual input clock selector control.
or H), these pins function as the CKINn active clock
indicator output.
0 = CKINn is not the active input clock.
1 = CKINn is currently the active input clock to the
PLL.
CS[1:0]
00
01
10
11
Description
Active Input Clock
CKIN1
CKIN2
CKIN3
CKIN4
Si5366
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