PEB20570FV3.1T Infineon Technologies, PEB20570FV3.1T Datasheet - Page 212

PEB20570FV3.1T

Manufacturer Part Number
PEB20570FV3.1T
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB20570FV3.1T

Lead Free Status / Rohs Status
Not Compliant
6.2.5.4
HCSV Registers
Reading a channel from the Receive Output Buffer and Writing to a channel in the
Transmit Input Buffer is done according to the channel’s status vector in the Transmit
Output Buffer. This vector contains 7 flags:
Note: Accesses to these registers are possible only if register bit HCR:DSPCTRL = 1
NO
CRC
STOP
ABORT
FULL
Data Sheet
’x’ = not used
15
7
x
x
Channel Status Vector
Not Octet
0 =
1 =
CRC Error
0 =
1 =
Stop Indication
0 =
1 =
Abort Indication
0 =
1 =
Receive Buffer Full Indication
FLAG
14
6
x
Normal operation
The last bits of a message have not filled an octet (8 bits)
No CRC error in received message
CRC error was detected in the received message
Normal operation
HDLCU has detected an end of message flag in the receive
direction. The DSP must read the octet in the Receive Output
Buffer before the next message start flag is detected
Normal operation
The DSP has detected an incoming abort message (7
consecutive ’1s’). The STOP flag is also set to 1. This means
that the DSP should ignore the current message being
transmitted over the channel in question and report to the
external micro controller
EMPTY
13
5
x
FULL
12
4
read
x
195
ABORT
11
3
x
Addresses: 40A0
STOP
10
2
x
Register Description
CRC
9
x
1
PEB 20570
PEB 20571
2003-07-31
H
- 40BF
NO
8
0
x
H

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