KU82596DX25 S Z714 Intel, KU82596DX25 S Z714 Datasheet - Page 29

• Manufacturer Part Number: KU82596DX25 S Z714
• Manufacturer: Intel

Specifications of KU82596DX25 S Z714

• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Mounting: Surface Mount
• Operating Temperature (max): 85C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Not Compliant

The 82596 B stepping supports Big Endian byte ordering for dword word and byte entities in Linear mode
only All 82596 B 32-bit address pointers are treated as 32-bit Big Endian entities however the SCB absolute
address and statistical counters are treated as two 16-bit Big Endian entities This 32-bit Big Endian entity
support is configured via bit 7 in the SYSBUS byte
The 82596 C-step has a New Enhanced Big Endian Mode where in Linear Addressing mode true 32-bit Big
Endian functionality is achieved New Enhanced Big Endian Mode is enabled exactly the same as the B-step
by setting bit 7 of the SYSBUS byte This mode is software compatible with the big endian mode of the B-step
with one exception no 32-bit addresses need to be swapped by software in the C-step In this new mode the
82596 C-step treats 32-bit address pointers as true 32-bit entities and the SCB absolute address and statistical
counters are still treated as two 16-bit big endian entities Not setting this mode will configure the 82596 C-step
to be 100% compatible to the A1-step big endian mode
All 82596 memory entities must be word or dword aligned except the transmit buffers can be byte aligned
for the 82596 B or C steppings
An example of a double word entity is a frame descriptor command status dword whereas the raw data of the
frame are byte entities Both 32- and 16-bit buses are supported When a 16-bit bus is used with Big Endian
memory organization data lines D
swap operations
COMMAND UNIT (CU)
The Command Unit is the logical unit that executes Action Commands from a list of commands very similar to
a CPU program A Command Block is associated with each Action Command The CU is modeled as a logical
machine that takes at any given time one of the following states
The CPU can affect CU operation in two ways by issuing a CU Control Command or by setting bits in the
Command word of the Action Command
When programming the 82596 CU it is important to consider the asynchronous way the 82596 processes
commands If a command is issued to the 82596 CU it may be busy processing other commands In order to
avoid asynchronous race conditions the following guidelines are recommended to the 82596 programmer
Idle The CU is not executing a command and is not associated with a CB on the list This is the initial state
Suspended The CU is not executing a command however it is associated with a CB on the list The
suspend state can only be reached if the CPU forces it through the SCB or sets the suspend bit in the RFD
Active The CU is executing an Action Command and pointing to its CB
If the CU is already in the Active state and another command needs to be executed it is unwise to
immediately issue another CU Start command If a new command (or list of commands) needs to be
started first issue a CU Suspend command wait for the CU to become Suspended then issue the new CU
Start This will insure that all commands are processed correctly
In general it is a good idea to make sure any CU command has been accepted and executed before
issuing a new control command to the CU
15
– D
0
are used The 82596 has an internal crossover that handles these
NOTE
82596DX SX
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