EP3C10F256C8N Altera, EP3C10F256C8N Datasheet - Page 123

• Manufacturer Part Number: EP3C10F256C8N
• Description: IC CYCLONE III FPGA 10K 256-FBGA
• Manufacturer: Altera
• Series: Cyclone® IIIr

Specifications of EP3C10F256C8N

• Number Of Logic Elements/cells: 10320
• Number Of Labs/clbs: 645
• Total Ram Bits: 423936
• Number Of I /o: 182
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 256-FBGA
• Family Name: Cyclone III
• Number Of Logic Blocks/elements: 10320
• # I/os (max): 182
• Frequency (max): 402MHz
• Process Technology: 65nm
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 10320
• Ram Bits: 423936
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: FBGA
• No. Of Logic Blocks: 645
• Family Type: Cyclone III
• No. Of I/o's: 182
• I/o Supply Voltage: 3.3V
• Operating Frequency Max: 402MHz
• Operating Temperature Range: 0°C To +85°C
• Rohs Compliant: Yes
• For Use With: 544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2417; EP3C10F256C8N

Chapter 6: I/O Features in the Cyclone III Device Family
Chapter Revision History
Table 6–7. Chapter Revision History (Part 3 of 3)
© December 2009
July 2007
March 2007
Date
Altera Corporation
Version
1.1
1.0
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Initial release.
Updated feetpara note in “Programmable Current Strength” section.
Updated feetpara note in “Slew Rate Control” section.
Updated feetpara note in “Open-Drain Output” section.
Updated feetpara note in “Bus Hold” section.
Updated feetpara note in “Programmable Pull-Up Resistor” section.
Updated feetpara note in “PCI-Clamp Diode” section.
Updated Figure 6–13.
Updated Figure 6–14 and added Note (1).
Updated “I/O Banks” section.
Updated Note (5) to Figure 6–15.
Updated “DDR/DDR2 and QDRII Pads” section and corrected ‘cms’ to ‘cmd’.
Updated Note 3 in Table 6-8.
Added chapter TOC and “Referenced Documents” section.
Changes Made
Cyclone III Device Handbook, Volume 1
6–23