EP2SGX130GF1508I4N Altera, EP2SGX130GF1508I4N Datasheet - Page 35

IC STRATIX II GX 130K 1508-FBGA

EP2SGX130GF1508I4N

Manufacturer Part Number
EP2SGX130GF1508I4N
Description
IC STRATIX II GX 130K 1508-FBGA
Manufacturer
Altera
Series
Stratix® II GXr
Datasheet

Specifications of EP2SGX130GF1508I4N

Number Of Logic Elements/cells
132540
Number Of Labs/clbs
6627
Total Ram Bits
6747840
Number Of I /o
734
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1508-FBGA
Family Name
Stratix II GX
Number Of Logic Blocks/elements
132540
# I/os (max)
734
Frequency (max)
732.1MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.2V
Logic Cells
132540
Ram Bits
6747840
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
1508
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2175

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2SGX130GF1508I4N
Manufacturer:
Sunon
Quantity:
1 000
Part Number:
EP2SGX130GF1508I4N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP2SGX130GF1508I4N
Manufacturer:
ALTERA
0
Part Number:
EP2SGX130GF1508I4N
Manufacturer:
ALTERA
Quantity:
80
Part Number:
EP2SGX130GF1508I4N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Altera Corporation
October 2007
Figure 2–21. 8B/10B Decoder
The 8B/10B decoder in single-width mode translates the 10-bit encoded
data into the 8-bit equivalent data or control code. The 10-bit code
received must be from the supported Dx.y or Kx.y list with the proper
disparity or error flags asserted. All 8B/10B control signals, such as
disparity error or control detect, are pipelined with the data and
edge-aligned with the data.
decoded in the 8-bit data + 1-bit control indicator.
Figure 2–22. 8B/10B Decoder Conversion
The 8B/10B decoder in double-width mode translates the 20-bit
(2 × 10-bits) encoded code into the 16-bit (2 × 8-bits) equivalent data or
control code. The 20-bit upper and lower symbols received must be from
the supported Dx.y or Kx.y list with the proper disparity or error flags
To Byte
Deserializer
Parallel data
MSB received last
9
j
dataout[15..8]
Status Signals[1] (1)
dataout[7..0]
Status Signals[0]
h
8
H
7
g
7
G
6
(1)
Figure 2–22
8B/10B conversion
6
5
F
f
E
Stratix II GX Device Handbook, Volume 1
4
5
i
Decoder
Decoder
8B/10B
MSByte
8B/10B
LSByte
D
3
e
4
shows how the 10-bit symbol is
2
C
d
3
1
B
c
2
Stratix II GX Architecture
datain[19..10]
datain[9..0]
LSB received first
0
A
b
1
+
a
0
ctrl
From Rate
Matcher
2–27

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