Z9025106PSG Zilog, Z9025106PSG Datasheet - Page 30

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Z9025106PSG

Manufacturer Part Number
Z9025106PSG
Description
IC 32K 8BIT DTC OTP 42-DIP
Manufacturer
Zilog
Datasheets

Specifications of Z9025106PSG

Applications
TV Controller
Core Processor
Z8
Program Memory Type
OTP (32 kB)
Controller Series
Digital Television Controller (DTC)
Ram Size
300 x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
27
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
42-DIP (0.600", 15.24mm)
Processor Series
Z902x
Core
Z8
Data Bus Width
8 bit
Program Memory Size
32 KB
Data Ram Size
300 B
Interface Type
I2C
Maximum Clock Frequency
6 MHz
Number Of Programmable I/os
27
Mounting Style
Through Hole
On-chip Adc
4 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
5
On-Screen Display
5.1
The On-Screen Display (OSD) module generates and displays a 10 row by 24
columns of 512 characters at 14 x 18-dots resolution. The color of each character
can be specified independently.
The televison OSD controller uses H
internal circuitry to the video signal, then outputs RGB and Video Blank (VBLANK)
signals. The VBLANK signal is used to multiplex the OSD signal and video signal
onto the screen. The result is that the On-Screen Display is superimposed over
the TV picture.
The display results from the successful timing of several components:
OSD Position
OSD Positioning is controlled by programming the following registers:
OSD Control Register
Table 8
Bit
R/W
Reset
Note: R = Read W = Write X = Indeterminate
OSD Positioning
Second Color Feature
Mesh and Halftone Effect
OSD Fade
Inter-Row Spacing
Character Generation
OSD Control Register (Table 8)
Vertical Position Register (Table 9)
Horizontal Position Register (Table 10)
OSD Control Register 00h:Bank A (OSD_CNTL)
7
R/W
0
6
R/W
x
5
R/W
x
SYNC
4
32 KB Television Controller with OSD
R/W
and V
x
3
SYNC
R/W
x
signals to synchronize its
2
R/W
x
1
R/W
PS001301-0800
x
0
R/W
x
22

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