Z9025106PSG Zilog, Z9025106PSG Datasheet - Page 89

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Z9025106PSG

Manufacturer Part Number
Z9025106PSG
Description
IC 32K 8BIT DTC OTP 42-DIP
Manufacturer
Zilog
Datasheets

Specifications of Z9025106PSG

Applications
TV Controller
Core Processor
Z8
Program Memory Type
OTP (32 kB)
Controller Series
Digital Television Controller (DTC)
Ram Size
300 x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
27
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
42-DIP (0.600", 15.24mm)
Processor Series
Z902x
Core
Z8
Data Bus Width
8 bit
Program Memory Size
32 KB
Data Ram Size
300 B
Interface Type
I2C
Maximum Clock Frequency
6 MHz
Number Of Programmable I/os
27
Mounting Style
Through Hole
On-chip Adc
4 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 70 3-Bit ADC Data Register 00h: Bank C (3ADC_DTA)
Table 71 4-Bit ADC Data Register 01h: Bank F (4ADC_DTA)
P41 must be set to input mode to select ADC1.
Bit
R/W
Reset
Note: R = Read W = Write X = Indeterminate
Bit/Field
Reserved
ADC Speed
ADC Input Selection
ADC Data
Bit
R/W
Reset
Note: R = Read W = Write X = Indeterminate
Bit/Field
ADC Speed
ADC Input Selection
ADC Data
R/W
7
x
R/W
R/W
7
0
6
0
R/W
6
0
R/W
Bit Position
7
6, 5
4, 3
2, 1, 0
Bit Position
7, 6
5, 4
3, 2, 1, 0
5
0
R/W
5
0
R/W
32 KB Television Controller with OSD
4
0
R/W
4
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
R
3
0
R/W
3
x
Value Description
Value Description
00
01
10
11
00
01
10
11
00
01
10
00
01
10
11
11
R/W
2
x
R/W
2
x
No ADC - POR
SCLK/2
SCLK/3
SCLK/4
Select ADC0 - POR
Select ADC 1
Select ADC 2
Select ADC 3
Digitized data from
selected ADC input
Return 1
No effect
No ADC - POR
SCLK/2
SCLK/3
SCLK/4
Select ADC0 - POR
Select ADC 1
Select ADC 2
Select ADC 3
Digitized data from
selected ADC input
R/W
1
R/W
x
PS001301-0800
1
x
R/W
R/W
0
x
0
x
81

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