Z9025106PSG Zilog, Z9025106PSG Datasheet - Page 66

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Z9025106PSG

Manufacturer Part Number
Z9025106PSG
Description
IC 32K 8BIT DTC OTP 42-DIP
Manufacturer
Zilog
Datasheets

Specifications of Z9025106PSG

Applications
TV Controller
Core Processor
Z8
Program Memory Type
OTP (32 kB)
Controller Series
Digital Television Controller (DTC)
Ram Size
300 x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
27
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
42-DIP (0.600", 15.24mm)
Processor Series
Z902x
Core
Z8
Data Bus Width
8 bit
Program Memory Size
32 KB
Data Ram Size
300 B
Interface Type
I2C
Maximum Clock Frequency
6 MHz
Number Of Programmable I/os
27
Mounting Style
Through Hole
On-chip Adc
4 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 40 Port 2 Mode Register F6h: P2M
When P27/P26 or P25/P24 are used as I
automatically set to open-drain mode.
Table 41 Port 2 Data Register 02h: P2
Bit
R/W
Reset
Note: R = Read W = Write X = Indeterminate
Bit/
Field
P27 I/O Definition
P26 I/O Definition
P25 I/O Definition
P24 I/O Definition
P23 I/O Definition
P22 I/O Definition
P21 I/O Definition
P20 I/O Definition
Bit
R/W
Reset
Note: R = Read W = Write X = Indeterminate
R/W
W
7
1
7
x
Bit
Position
7
6
5
4
3
2
1
0
R/W
W
6
1
6
x
R/W
W
5
1
5
x
R/W
W
W
W
W
W
W
W
W
32 KB Television Controller with OSD
R/W
W
2
4
1
Value Description
4
x
C pins, then these pins are
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Defines P27 as Output
Defines P27 as Input
Defines P26 as Output
Defines P26 as Input
Defines P25 as Output
Defines P25 as Input
Defines P24 as Output
Defines P24 as Input
Defines P23 as Output
Defines P23 as Input
Defines P22 as Output
Defines P22 as Input
Defines P21 as Output
Defines P21 as Input
Defines P20 as Output
Defines P20 as Input
R/W
W
3
1
3
x
R/W
W
2
1
2
x
R/W
PS001301-0800
W
1
1
1
x
R/W
W
0
1
0
x
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