SL811S Cypress Semiconductor Corp, SL811S Datasheet - Page 14

• Manufacturer Part Number: SL811S
• Description: IC USB SLAVE CTRLR 28PLCC
• Manufacturer: Cypress Semiconductor Corp

Specifications of SL811S

• Applications: USB Host/Slave Controller
• Controller Series: USB-Hosts
• Ram Size: 256 x 8
• Interface: USB
• Number Of I /o: 8
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 65°C
• Mounting Type: Surface Mount
• Package / Case: 28-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Core Processor: -
• Program Memory Type: -
• Other names: 428-1460

5.4.5
Register indicates currently selected data set for each endpoint.
5.4.6
Read only Register contains the 7 low order bits of Frame Number in positions: bit 7–1. Bit 0 is undefined. Register is updated
when a SOF packet is received. User should not write to this register.
5.4.7
Read only Register contains the 4 low order bits of Frame Number in positions: bit 7–4. Bits 3–0 are undefined, and should be
masked when read by the user. Register is updated when a SOF packet is received. User should not write to this register.
5.4.8
Register contains the low order 8-bits of DMA count. DMA total count is the total number of bytes to be transferred between a
peripheral to the SL811S/T. The count may sometimes require up to 16-bits, thus the count is represented in two registers: Total
Count Low, and Total Count High. EP3 is only supported with DMA operation.
5.4.9
Register contains the High order 8-bits of DMA count. When written, this register enables DMA if the DMA Enable bit is set in
the Control Register. User should always write Low Count Register first, followed by a write to High Count Register even if high
count is 00H.
6.0
The diagram below indicates the pin assignments for the SL811S 28-pin PLCC Package.
Document #: 38-08009 Rev. **
Bit Position
Current Data Set Register, Address [0EH]
SOF Low Register, Address [15h]
SOF High Register, Address [16h]
DMA Total Count Low Register, Address [35h]
DMA Total Count High Register, Address [36h]
4-7
SL811S/T Physical Connection
0
1
2
3
Endpoint 0
Endpoint 1
Endpoint 2
Endpoint 3
Bit Name
Reserved
Endpoint 0a = 0, Endpoint 0b = 1
Endpoint 1a = 0, Endpoint 1b = 1
Endpoint 2a = 0, Endpoint 2b = 1
Endpoint 3a = 0, Endpoint 3b = 1
For the Host
Function
SL811S/T
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