SL811S Cypress Semiconductor Corp, SL811S Datasheet - Page 6

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SL811S

Manufacturer Part Number
SL811S
Description
IC USB SLAVE CTRLR 28PLCC
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of SL811S

Applications
USB Host/Slave Controller
Controller Series
USB-Hosts
Ram Size
256 x 8
Interface
USB
Number Of I /o
8
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 65°C
Mounting Type
Surface Mount
Package / Case
28-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Core Processor
-
Program Memory Type
-
Other names
428-1460

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4.2
4.3
4.3.1
4.3.2
4.4
The SL811S/T Data Port interface provides an 8-bit bidirectional data path with appropriate control signals such as CS, RD, WR,
A0 and INTR lines. This feature enables it to interface to any external processor or controller (Intel, Motorola, TI, Analog Devices,
etc.). The control Read and Write signals, Chip Select and a single address line A0, with the 8-bit data bus, support both
programmed I/O or Memory mapped I/O designs.
Access to the memory and control register space is a simple two step process, requiring an address write with A0 set to '0' followed
by a register/memory read or write cycle with address line A0 set to '1'.
Document #: 38-08009 Rev. **
• Conforms to USB Specification 1.1
• Standard Microprocessor Interface
• Supports DMA Transfers
• 256 x 8 SRAM “On-Chip” memory
• 8-bit Bidirectional Data Port, interfaces to any external Bus or CPU (Intel, Motorola, etc.)
• Four USB Endpoints
• On-Chip USB transceivers
• On-Chip full/slow speed USB transceivers
• Supports power suspend mode
• 3.3V power source, CMOS Technology
• Logic interface is 5 Volt tolerant
• Memory buffer includes Double buffer Ping Pong operation scheme
• Operates on either 12-MHz or 48-MHz crystal/clock.
• Auto Address increment mode to simplify memory access and improve performance
• Available in 28-Pin PLCC or 48 LPQFP packages
• Generic WDM Mini Port driver for Windows 98, 2000/NT 5.0, and CE3.0, firmware and system USB demo source examples
are available.
D+
D-
Block Diagram
Features
USB Specification Compliance
CPU Interface
Data Port, Interface to external Micro-Processor
XCVRS
USB
GENERATOR
X1
CLOCK
INTERFACE
ENGINE
SERIAL
X2
REGISTERS
CONTROL
BUFFER
RAM
&
CONTROLLER
INTERRUPT
PROCESSOR
INTERFACE
INTERFACE
DMA
SL811S/T
INTR
nDRQ
nDACK
nWR
nCS
nRST
nRD
D0-D7
Page 6 of 27

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