MPC180LMB Freescale Semiconductor, MPC180LMB Datasheet - Page 38

• Manufacturer Part Number: MPC180LMB
• Description: IC SECURITY PROCES 66MHZ 100LQFP
• Manufacturer: Freescale Semiconductor

Specifications of MPC180LMB

• Processor Type: Security Processor
• Speed: 66MHz
• Voltage: 1.8V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

Freescale Semiconductor, Inc.
Operational Registers
DATA_IN registers will start processing. When completed, the resulting output will be held
in a working register until the output ciphertext is read from the DATA_OUT registers.
Then the held data will be copied to the DATA_OUT registers and the ORDY signal
asserted again. The interrupt IRQ signal will be active as long as ODRY is asserted.
4.1.4 Key Registers
The DEU supports up to three independent 56-bit keys. Each key uses two 32-bit registers
(56 bits of key plus 8 bits of parity). Note that key parity bits are ignored in processing.
For single DES, only one key is used (Key1_L and Key1_R); the other two are ignored. For
Triple DES, all three keys are used. To simulate two-key Triple DES (in which the first and
third keys are identical), Key1_L and Key1_R are also written to Key3_L and Key3_R.
When using three-key triple DES, the three keys must be written in order (Key1, Key2, and
then Key3), otherwise the first key may overwrite the third.
The key registers are read/write and must not be written while data is being
encrypted/decrypted. Doing so will result in corrupted data.
4.1.5 Initialization Vector
The DEU supports CBC mode, which requires a 64-bit initialization vector (IV). The IV
uses two 32-bit registers (IV_L and IV_R). The IV should be written before the first block
of data is encrypted. After each block of data is encrypted, the Initialization Vector register
is updated to prepare for the next block of data. This register is readable so that the current
encryption context (mode, keys, and IV) can be saved and restored.
The Initialization Vector registers must not be written while data is being encrypted or
decrypted. Doing so will result in corrupted data.
4.1.6 DATAIN
Data to be encrypted or decrypted is written to the DATAIN registers. Data is first written
to DATAIN-R and then to DATAIN-L. DEU processing begins automatically with the
completion of the write to the DATAIN-L register.
4.1.7 DATAOUT
Processed data is stored in the DATAOUT registers. Data must be read from DATAOUT-R
first. Reading data from DATAOUT-L indicates completion of the 64-bit block read, which
allows the DEU to write the next 64 bits to DATAOUT-R and DATAOUT-L. If two 64-bit
blocks have been written to the DATAIN registers while the DATAOUT registers haven’t
been read, the DEU will stall to prevent an overwrite. IF three 64-bit blocks are written to
DATAIN before any are read from DATAOUT, the IRDY bit in the Status register will go
low, indicating that any additional blocks written to DATAIN will cause a loss of data due
to overwrite.
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MPC180LMB Security Processor User’s Manual
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