DS21FF44 Maxim Integrated Products, DS21FF44 Datasheet - Page 56

IC FRAMER E1 4X4 16CH 300-BGA

DS21FF44

Manufacturer Part Number
DS21FF44
Description
IC FRAMER E1 4X4 16CH 300-BGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS21FF44

Controller Type
E1 Framer
Interface
Parallel/Serial
Voltage - Supply
2.97 V ~ 3.63 V
Current - Supply
300mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
300-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS21FF44
Manufacturer:
Maxim Integrated
Quantity:
10 000
RDS0M: RECEIVE DS0 MONITOR REGISTER (Address = AB Hex)
14.
Each framer in the DS21Q44 contains provisions for both processor based (i.e., software based) signaling
bit access and for hardware based access. Both the processor based access and the hardware-based access
can be used simultaneously if necessary. The processor based signaling is covered in Section 14.1 and the
hardware based signaling is covered in Section 14.2.
14.1. Processor-Based Signaling
The Channel Associated Signaling (CAS) bits embedded in the E1 stream can be extracted from the
receive stream and inserted into the transmit stream by the framer. Each of the 30 voice channels has four
signaling bits (A/B/C/D) associated with it. The numbers in parenthesis () are the voice channel
associated with a particular signaling bit. The voice channel numbers have been assigned as described in
the ITU documents. Please note that this is different than the channel numbering scheme (1 to 32) that is
used in the rest of the data sheet. For example, voice channel 1 is associated with timeslot 1 (Channel 2)
and voice Channel 30 is associated with timeslot 31 (Channel 32). There is a set of 16 registers for the
receive side (RS1 to RS16) and 16 registers on the transmit side (TS1 to TS16). The signaling registers
are detailed below.
(MSB)
SYMBOL
B1
SIGNALING OPERATION
B1
B2
B3
B4
B5
B6
B7
B8
B2
POSITION
RDS0M.7
RDS0M.6
RDS0M.5
RDS0M.4
RDS0M.3
RDS0M.2
RDS0M.1
RDS0M.0
B3
Receive DS0 Channel Bit 1. MSB of the DS0 channel (first
bit to be received)
Receive DS0 Channel Bit 2
Receive DS0 Channel Bit 3
Receive DS0 Channel Bit 4
Receive DS0 Channel Bit 5
Receive DS0 Channel Bit 6
Receive DS0 Channel Bit 7
Receive DS0 Channel Bit 8. LSB of the DS0 channel (last bit
to be received)
B4
56 of 117
NAME AND DESCRIPTION
B5
B6
B7
(LSB)
B8

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