CS8952-CQZ Cirrus Logic Inc, CS8952-CQZ Datasheet - Page 78

IC TXRX 100/10 PHY 100TQFP

CS8952-CQZ

Manufacturer Part Number
CS8952-CQZ
Description
IC TXRX 100/10 PHY 100TQFP
Manufacturer
Cirrus Logic Inc
Type
Transceiverr
Datasheet

Specifications of CS8952-CQZ

Package / Case
100-TQFP, 100-VQFP
Protocol
MII
Voltage - Supply
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Product
Ethernet Transceivers
Number Of Transceivers
1
Standard Supported
100BASE-FX or 100BASE-TX or 10BASE-T
Data Rate
10 Mbps or 100 Mbps
Supply Voltage (max)
6 V
Supply Voltage (min)
- 0.3 V
Supply Current (max)
+/- 10 mA
Maximum Operating Temperature
+ 70 C
Supply Voltage Range
4.75V To 5.25V
Logic Case Style
TQFP
No. Of Pins
100
Operating Temperature Range
0°C To +70°C
Msl
MSL 3 - 168 Hours
Filter Terminals
SMD
Rohs Compliant
Yes
Driver Case Style
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1206

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RESET - Reset. Input, Pin 15.
XTAL_I - Crystal Input, Pin 96.
XTAL_O - Crystal Output, Pin 97.
RSVD - Reserved. Pins 74, 75, 76, 77, 84, 98, and 99.
VDD_MII - MII Power. Pins 21, 34, and 66.
VDD - Core Power. Pins 2, 11, 19, 40, 54, 79, 82, 88, 89, 94, and 100.
VSS - Ground. Pins 1, 3, 10, 12, 13, 18, 20, 22, 35, 39, 41, 53, 55, 65, 78, 83, 85, 87, 90, 93, and 95.
CrystalLAN™ 100BASE-X and 10BASE-T Transceiver
DS206F1
This active high input initializes the CS8952, and causes the CS8952 to latch the input signal on the
following pins: COL/PHYAD0, CRS/PHYAD2, RX_ER/PHYAD4/RXD4, 10BT_SER, BP4B5B, BPALIGN,
BPSCR, ISODEF, REPEATER, RXD[1]/PHYAD1, and RXD[3]/PHYAD3.
A 25 MHz crystal should be connected across pins XTAL_I and XTAL_O. If a crystal is not used, a
25 MHz CMOS level clock may be connected to XTAL_I and XTAL_O left open.
NOTE: The XTAL_I pin capacitive load may be as high as 35pF. Any external clock source connected to this
pin must be capable of driving larger capacitive loads.
These seven pins are reserved and should be tied to VSS.
These pins provide power to the CS8952 MII interface. Typically VDD_MII will be either +5V or +3.3V.
These pins provide power to the CS8952 core. Typically, VDD should be +5V.
These pins provide a ground reference for the CS8952.
CS8952
78

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