ISP1302HN-T ST-Ericsson Inc, ISP1302HN-T Datasheet - Page 32

• Manufacturer Part Number: ISP1302HN-T
• Description: IC USB OTG TRANSCEIVER 24HVQFN
• Manufacturer: ST-Ericsson Inc
• Type: Transceiverr

Specifications of ISP1302HN-T

• Number Of Drivers/receivers: 1/1
• Protocol: USB 2.0
• Voltage - Supply: 3 V ~ 4.5 V
• Mounting Type: Surface Mount
• Package / Case: 24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
Table 40.
Table 42.
ISP1302_1
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Interrupt Latch register (address S = 0Ah, C = 0Bh) bit allocation
Interrupt Enable Low register (address S = 0Ch, C = 0Dh) bit allocation
9.1.3.2 Interrupt Latch register
9.1.3.3 Interrupt Enable Low register
DP_INT_
DP_INT_
R/S/C
R/S/C
INT
IEL
7
0
7
0
This register indicates the source that generates an interrupt. For the bit allocation, see
Table
Table 41.
The bits in this register enable interrupts when the corresponding bits in the Interrupt
Source register change from logic 1 to logic 0.
register.
Bit
7
6
5
4
3
2
1
0
ACON_INT
reserved
BDIS_
R/S/C
R/S/C
40.
6
0
6
0
Symbol
DP_INT_INT
BDIS_ACON_INT 0 — No interrupt
ID_FLOAT_INT
DM_HI_INT
ID_GND_INT
DP_HI_INT
SESS_VLD_INT
VBUS_VLD_INT
Interrupt Latch register (address S = 0Ah, C = 0Bh) bit description
ID_FLOAT_
ID_FLOAT
R/S/C
R/S/C
_IEL
INT
5
0
5
0
Rev. 01 — 24 May 2007
Description
0 — No interrupt
1 — Interrupt on the DP_INT status change
1 — Interrupt on the BDIS_ACON status change
0 — No interrupt
1 — Interrupt on the ID_FLOAT status change
0 — No interrupt
1 — Interrupt on the DM_HI status change
0 — No interrupt
1 — Interrupt on the ID_GND status change
0 — No interrupt
1 — Interrupt on the DP_HI status change
0 — No interrupt
1 — Interrupt on the SESS_VLD status change
0 — No interrupt
1 — Interrupt on the VBUS_VLD status change
DM_HI_IEL
DM_HI_
R/S/C
R/S/C
INT
4
0
4
0
ID_GND_
ID_GND_
R/S/C
R/S/C
INT
IEL
3
0
3
0
USB OTG transceiver with carkit support
Table 42
DP_HI_INT SESS_VLD
DP_HI_IEL SESS_VLD
R/S/C
R/S/C
shows the bit allocation of the
2
0
2
0
R/S/C
R/S/C
_INT
_IEL
1
0
1
0
© NXP B.V. 2007. All rights reserved.
ISP1302
VLD_INT
VLD_IEL
VBUS_
VBUS_
R/S/C
R/S/C
0
0
0
0
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