ISP1302HN-T ST-Ericsson Inc, ISP1302HN-T Datasheet - Page 39

• Manufacturer Part Number: ISP1302HN-T
• Description: IC USB OTG TRANSCEIVER 24HVQFN
• Manufacturer: ST-Ericsson Inc
• Type: Transceiverr

Specifications of ISP1302HN-T

• Number Of Drivers/receivers: 1/1
• Protocol: USB 2.0
• Voltage - Supply: 3 V ~ 4.5 V
• Mounting Type: Surface Mount
• Package / Case: 24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
ISP1302_1
Product data sheet
10.2 Clock wake-up event
The clock wakes up when any of the following events occurs on the ISP1302 pins:
The event triggers the clock to start. The clock start-up time is t
guaranteed after six clock cycles. The clock will always start at its rising edge.
When an event is triggered and the clock is started, the clock will remain active for t
If bit PWR_DN is not cleared within this period, the clock will stop. If the clock wakes up
because of any event other than SCL going LOW, an interrupt will be generated once the
clock is active.
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Pin SCL goes LOW.
Pin V
Interrupt Enable High register is set.
Status bit ID_FLOAT changes from logic 1 to logic 0, provided bit ID_FLOAT_IEL of
the Interrupt Enable Low register is set.
Status bit ID_FLOAT changes from logic 0 to logic 1, provided bit ID_FLOAT_IEH of
the Interrupt Enable High register is set.
DP goes HIGH provided the DP_HI_IEH bit in the Interrupt Enable High register is
set.
DM goes HIGH provided the DM_HI_IEH bit in the Interrupt Enable High register is
set.
BUS
goes above the session valid threshold, provided bit SESS_VLD_IEH of the
Rev. 01 — 24 May 2007
USB OTG transceiver with carkit support
startup(lclk)
© NXP B.V. 2007. All rights reserved.
. A stable clock is
ISP1302
d(clkstp)
38 of 63
.