ISPPAC-POWR604-01TN44E Lattice, ISPPAC-POWR604-01TN44E Datasheet - Page 6

no-image

ISPPAC-POWR604-01TN44E

Manufacturer Part Number
ISPPAC-POWR604-01TN44E
Description
Supervisory Circuits PROGRAMMABLE PWR SUPPLY CONTR
Manufacturer
Lattice
Datasheet

Specifications of ISPPAC-POWR604-01TN44E

Number Of Voltages Monitored
6
Monitored Voltage
Adjustable
Undervoltage Threshold
1.03 V
Overvoltage Threshold
5.72 V
Manual Reset
Not Resettable
Watchdog
No Watchdog
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.25 V
Supply Current (typ)
10000 uA
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
fpBGA-100
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISPPAC-POWR604-01TN44E
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Lattice Semiconductor
Power-on-Reset
AC/Transient Characteristics
Digital Specifications
I
I
V
I
I
1. [OUT5-OUT8] and [COMP1-COMP6] can sink up to 20mA max. per pin for LEDs, etc. However, output voltage levels may exceed V
V
V
1. POR tests run with 10kΩ resistor pulled up to V
Voltage Monitors
t
t
Oscillators
f
PLDCLK
Range
PLDCLKext
Timers
Timeout
Range
1. See Typical Performance Graphs.
2. f
IL,
PU
SINKOUT
SINKTOTAL
PD5
PD20
CLK
OL
LPOR
HPOR
Symbol
combined sink currents from all outputs (OUT, COMP) should not exceed I
I
Symbol
CLK
IH
Symbol
frequency deviation with respect to VDD, 0.4%/volt, typical.
V
output is guaranteed to be driven low
V
output is guaranteed driven high, and device
initializes
DD
DD
Propagation Delay. Output
transitions after a step input.
Propagation Delay. Output
transitions after a step input.
Internal master clock frequency Note 2
Programmable frequency range
of PLD clock (8 binary steps)
Max frequency of applied
external clock source
Range of programmable
time-out duration (15 steps)
Input or I/O leakage current, no pull-
up
Input pull-up current (TMS, TDI,
TRST)
Open-drain output set LOW
Maximum sink current for logic out-
puts [OUT5-OUT8], [COMP1-
COMP6]
Total combined sink currents from all
outputs [OUT, COMP]
supply threshold beyond which POR
supply threshold above which POR
Parameter
Parameter
Parameter
Over Recommended Operating Conditions
Over Recommended Operating Conditions
DD.
Glitch filter set to 5µs.
Input V
Glitch filter set to 20us.
Input V
Internal Osc 250kHz
External clock applied
Internal Osc 250kHz
TRIP
TRIP
0V ≤ V
25 °C
25 °C
I
(Note 1)
(Note 1)
SINKOUT
V
V
+ 100mV to V
+ 100mV to V
DD
DD
6
Conditions
IN
ramping up
Conditions
ramping up
Conditions
≤ V
= 4mA
SINKTOTAL
DDINP
1
1
TRIP
TRIP
1
or V
1
.
- 100mV
- 100mV
DD
ispPAC-POWR604 Data Sheet
Min.
Min.
Min.
1.95
0.03
230
Typ.
Typ.
70
Typ.
20
5
+/-10
Max.
Max.
1.15
2.1
0.4
20
80
Max.
330
250
524
1
Units
Units
OL
Units.
MHz
mA
mA
kHz
kHz
µA
µA
ms
V
V
µs
µs
V
. Total

Related parts for ISPPAC-POWR604-01TN44E