PSB3186FV14XT Infineon Technologies, PSB3186FV14XT Datasheet - Page 147

• Manufacturer Part Number: PSB3186FV14XT
• Manufacturer: Infineon Technologies

Specifications of PSB3186FV14XT

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

SQRR
SQXR1
4.2.5
Value after reset: 40
For general information please refer to
MSYN ... Multi-frame Synchronization State
0: The S/T receiver has not synchronized to the received F
1: The S/T receiver has synchronized to the received F
MFEN ... Multiframe Enable
Read-back of the MFEN bit of the SQXR register
SQR11-14 ... Received S Bits
Received S bits in frames 1, 6, 11 and 16
4.2.6
Value after reset: 4F
MFEN ... Multiframe Enable
Used to enable or disable the multiframe structure (see
0: S/T multiframe is disabled
1: S/T multiframe is enabled
Readback value in SQRR1.
SQX1-4 ... Transmitted S/Q Bits
Transmitted Q bits (F
Data Sheet
7
7
MSYN MFEN
SQRR1 - S/Q-Channel Receive Register 1
SQXR1- S/Q-Channel TX Register 1
0
MFEN
H
H
A
bit position) in frames 1, 6, 11 and 16.
0
0
0
0
Chapter
147
SQR1 SQR2 SQR3 SQR4
SQX1 SQX2 SQX3 SQX4
3.3.2.
A
Detailed Register Description
Chapter
and M bits
A
and M bits
3.3.2)
0
0
ISAC-SX TE
PSB 3186
2003-01-30
WR (35)
RD (35)